A 4b/Cell 8Gb NROM data-storage memory with enhanced write performance

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 51, Issue , 2008, Pages 422-624

  Sahar, Ran ^a   Lavan, Avi ^a   Geyari, Eran ^a   Berman, Amit ^a   Cohen, Itzic ^a   Tirosh, Ori ^a   Danon, Kobi ^a   Safer, Yair ^a   Betser, Yoram ^a   Givant, Amichai ^a   Kushnarenko, Alexander ^a   Horesh, Yaal ^a   Eliyahu, Ron ^a   Maayan, Eduardo ^a   Eitan, Boaz ^a   Jen, Wang Pei ^b   Feng, Yan ^b   Yao, Lin Ching ^b   Jin, Kwon Yi ^b   Woo, Kwon Sung ^b   Jing, Cai En ^b   Jing, Yi Jing ^b   Oh, Kim Jong ^b   Jiun, Yi Guan ^b   more..

^a Saifun Semiconductors   (Israel)

^b SMIC ^*  (China)

Author keywords

[No Author keywords available]

Indexed keywords

NETWORKS (CIRCUITS); SOLID STATE DEVICES;

90-NM CMOS; DATA PATTERNS; DATA STORAGE; DESIGN FEATURES; ERASE CYCLING;

ROM;

EID: 49549089782     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2008.4523237     Document Type: Conference Paper

References (3)

1. Y. Polansky, A. Lavan, R. Sahar et al., "A 4b/cell NROM 1Gb Data-Storage Memory", ISSCC Dig. Tech. Papers, pp. 448-449, Feb. 2006.
2. E. Maayan, R. Dvir, J. Shor et al., "A 512Mb NROM Data Storage Memory with 8MB/s Data Rate", ISSCC Dig Tech. Papers, pp. 76-77, Feb. 2002.
3. B. Eitan, P. Pavan, I. Bloom et al., "NROM: A Novel Localized Trapping, 2-bit Nonvolatile Memory Cell" Electron Devices Letters, vol. 21, no. 11, pp. 543-545, Nov. 2000.