On the nature of cache miss behavior: Is it √2?

Journal of Instruction-Level Parallelism

Volumn 10, Issue , 2008, Pages 1-22

  Hartstein, A ^a   Srinivasan, V ^a   Puzak, T R ^a   Emma, P G ^a  

^a IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 49449116570     PISSN: None     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (17)

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