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Volumn 16, Issue , 2004, Pages 383-386

Design of a monolithic 2 MHz fast transient voltage regulator chip

Author keywords

[No Author keywords available]

Indexed keywords

DC-DC CONVERTERS; MOBILE POWER SYSTEMS; MONOLITHIC INTEGRATION; TRANSIENT VOLTAGE REGULATION;

EID: 4944222230     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (1)

References (7)
  • 1
    • 0041438372 scopus 로고    scopus 로고
    • The earth is mobile - Power
    • Proceedings. ISPSD '03.2003 IEEE 15th International Symposium on
    • Efland, T.R. "The earth is mobile - power", Power Semiconductor Devices and ICs, 2003. Proceedings. ISPSD '03.2003 IEEE 15th International Symposium on,Page(s):2-9
    • (2003) Power Semiconductor Devices and ICs , pp. 2-9
    • Efland, T.R.1
  • 2
    • 0036045264 scopus 로고    scopus 로고
    • Design of a 4 MHz, 5V to 1V monolithic voltage regulator chip
    • Nick X. Sun, Xiaoming Duan, Xin Zhang, Alex Huang and Fred C. Lee," Design of a 4 MHz, 5V to 1V Monolithic Voltage Regulator Chip", ISPSD'2002 pp. 217-220
    • ISPSD'2002 , pp. 217-220
    • Sun, N.X.1    Duan, X.2    Zhang, X.3    Huang, A.4    Lee, F.C.5
  • 3
    • 0042156905 scopus 로고    scopus 로고
    • Stability analysis of linear-non linear control (LnLc) applied to fast transient response DC-DC converters
    • A. Barrado etc., "Stability Analysis of Linear-Non Linear Control (LnLc) Applied To Fast Transient Response DC-DC Converters." PESC'03, pp. 1175-1180, 2003
    • (2003) PESC'03 , pp. 1175-1180
    • Barrado, A.1
  • 4
    • 0003589082 scopus 로고
    • Ph.D Dissertation, Virginia Polytechnic Institute and State University, November
    • R.B. Ridley, "A New Small-Signal Model for Current-Mode Control", Ph.D Dissertation, Virginia Polytechnic Institute and State University, November, 1990
    • (1990) A New Small-signal Model for Current-mode Control
    • Ridley, R.B.1
  • 5
    • 0041438323 scopus 로고    scopus 로고
    • Optimization of LDMOS array design for SOA and hot carrier lifetime
    • Andy Strachan, Doug Brisbin, "Optimization of LDMOS Array Design for SOA and Hot Carrier Lifetime" ISPSD'2003
    • ISPSD'2003
    • Strachan, A.1    Brisbin, D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.