A vertical hall device in standard submicron CMOS technology

Proceedings of IEEE Sensors

Volumn , Issue , 2007, Pages 1480-1483

  Pascal, Joris ^a   Hébrard, Luc ^a   Kammerer, Jean Baptiste ^a   Frick, Vincent ^a   Blondé, Jean Philippe ^a  

^a UNIVERSITÉ DE STRASBOURG   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; ELECTRIC FAULT LOCATION; HALL EFFECT DEVICES; NONMETALS; SILICON; STANDARDS; TECHNOLOGY; WELDS;

1 / F NOISE; ACTIVE AREAS; CMOS TECHNOLOGIES; DEEP N-WELL; FEM SIMULATIONS; HALL DEVICES; HIGH VOLTAGES; LOW COSTS; N-TYPE SILICON; OFFSET REDUCTION; ON-CHIP CIRCUITRY; SHORT CIRCUIT; STANDARD CMOS TECHNOLOGY; SUB-MICRON CMOS TECHNOLOGY;

SENSORS;

EID: 48349135382     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICSENS.2007.4388694     Document Type: Conference Paper

References (6)

1. E. Schurig, C. Schott, P.-A. Besse, M. Demierre, R.S. Popovic, "0.2mT Residual offset of CMOS integrated vertical Hall sensors", Sensors and Actuators A, vol. 110, p. 98-104, 2004
2. R. S. Popovic, "The vertical Hall-effect device", IEEE Electron Device Letters, vol.5, Sept. 1984, pp. 357-358
3. R. S. Popovic, Hall effect devices - second edition, Institute of Physics Publishing, 2004
4. G. Arfken, Mathematical Methods for Physicists, Academic Press New York and London , 1970
5. E. Schurig,. Demierre, C. Schott, and R. S. Popovic, "A vertical Hall device in CMOS high-voltage technology", Sensors and Actuators A, vol. 97-98, 2002, pp. 47-53
6. P. Kejik, E. Schurig, F. Bergsma, R. S. Popoic, "First fully CMOS-integrated 3D Hall probe", Transducers'05, June 5-9, 2005, pp. 317-320