Modeling techniques and tests for partial faults in memory devices

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2002, Pages 89-93

  Al Ars, Zaid ^a   Van De Goor, Ad J ^a  

^a DELFT UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

DEFECT INJECTIONS; FAULT ANALYSIS; FAULT EFFECT; FAULT MODEL; MODELING TECHNIQUE;

EXHIBITIONS;

RANDOM ACCESS STORAGE;

EID: 48349091988     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2002.998254     Document Type: Conference Paper

References (7)

1. R.D. Adams and E.S. Cooley, "Analysis of a Deceptive Destructive Read Memory Fault Model and Recommended Testing," in Proc. IEEE North Atlantic Test Workshop, 1996.
2. Z. Al-Ars, Analysis of the Space of Functional Fault Models and Its Application to Embedded DRAMs, Technical Report no. 1-68340-28(1999)-07, CARDIT, Delft Univ. of Technology, Delft, The Netherlands, 1999.
3. Z. Al-Ars and A.J. van de Goor, "Impact of Memory Cell Array Bridges on the Faulty Behavior in Embedded DRAMs," in Proc. Asian Test Symp., 2000, pp. 282-289.
4. Z. Al-Ars and A.J. van de Goor, "Static and Dynamic Behavior of Memory Cell Array Opens and Shorts in Embedded DRAMs," in Proc. Design, Automation and Test in Europe, 2001, pp. 496-503.
5. Z. Al-Ars et al., "Simulation Based Analysis of Temperature Effect on the Faulty Behavior of Embedded DRAMs," in Proc. IEEE Intl Test Conf., 2001, pp. 783-792.
6. A.J. van de Goor, Testing Semiconductor Memories, Theory and Practice, ComTex Publishing, Gouda, The Netherlands, 1998, http://ce.et.tudelft.nl/ ~vdgoor/
7. A.J. van de Goor and Z. Al-Ars, "Functional Memory Faults: A Formal Notation and a Taxonomy," in Proc. IEEE VLSI Test Symp., 2000, pp. 281-289.