A cache architecture for counting bloom filters

ICON 2007 - Proceedings of the 2007 15th IEEE International Conference on Networks

Volumn , Issue , 2007, Pages 218-223

  Ahmadi, Mahmood ^a   Wong, Stephan ^a  

^a Department of Microelectronics

Author keywords

[No Author keywords available]

Indexed keywords

BLOOM FILTERING; CACHE ARCHITECTURE; INTERNATIONAL CONFERENCES; MEMORY ACCESSES; MULTI-LEVEL CACHE ARCHITECTURE; MULTI-LEVEL MEMORY HIERARCHIES; NETWORK PROCESSORS; PACKET CLASSIFICATION; PACKET PROCESSING; SPECIAL HARDWARE; WEB CACHING SYSTEMS;

ARCHITECTURE; BLOOMS (METAL); CIRCUIT THEORY; PACKET NETWORKS; REAL TIME SYSTEMS; STANDARDS; WAVE FILTERS;

DATA STORAGE EQUIPMENT;

EID: 48149099104     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICON.2007.4444089     Document Type: Conference Paper

References (10)

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