Optimizing area on the generation of specific circuits in FPGAs for SIMD applications

ARC 2005 - International Workshop on Applied Reconfigurable Computing 2005

Volumn , Issue , 2005, Pages 160-167

  León, Germán ^a   Claver, José M ^a   Fabregat, Germán ^a  

^a UNIVERSITAT JAUME I   (Spain)

Author keywords

Configurable computing; FPGA; Hardware compilation; High level description languages; SIMD applications

Indexed keywords

AUTOMATIC GENERATION; CONFIGURABLE COMPUTING; CONTEXT DEPENDENT; HARDWARE COMPILATION; HIGH LEVEL DESCRIPTION; HIGH LEVEL SPECIFICATION; LIBRARY COMPONENTS; TYPE INFERENCES;

DISCRETE WAVELET TRANSFORMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HIGH LEVEL LANGUAGES; RECONFIGURABLE ARCHITECTURES;

ITERATIVE METHODS;

EID: 48149085751     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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