Optimal subset mapping and convergence evaluation of mapping algorithms for distributing task graphs on multiprocessor SoC

2007 International Symposium on System-on-Chip Proceedings, SOC

Volumn , Issue , 2007, Pages

  Orsila, Heikki ^a   Salminen, Erno ^a   Hännikäinen, Marko ^a   Hämäläinen, Timo D ^a  

^a TAMPERE UNIVERSITY OF TECHNOLOGY   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPUTER SOFTWARE MAINTENANCE; CONFORMAL MAPPING; GRANULAR MATERIALS; GRAPH THEORY; INTEGRATED CIRCUITS; MULTIPROCESSING SYSTEMS; OPTIMIZATION; PROGRAMMABLE LOGIC CONTROLLERS; STANDARDS; SYSTEMS ANALYSIS;

ACYCLIC TASK GRAPHS; APPLICATION EXECUTION; ARCHITECTURE EXPLORATION; CONVERGENCE BEHAVIORS; EXTENSIVE SIMULATIONS; GRAPH SETS; GROUP MIGRATION; INTERNATIONAL SYMPOSIUM; MAPPING ALGORITHMS; MULTI-PROCESSOR SOC; MULTI-PROCESSOR SYSTEM-ON-CHIP; NEW ALGORITHM; NUMBER OF ITERATIONS; SYSTEM ON CHIPS; TASK DISTRIBUTION; TASK GRAPHS;

SIMULATED ANNEALING;

EID: 48049113953     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSOC.2007.4427433     Document Type: Conference Paper

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