A kick-back reduced comparator for a 4-6-bit 3-GS/s flash ADC in a 90nm CMOS process

Proceedings of the 14th International Conference "Mixed Design of Integrated Circuits and Systems", MIXDES 2007

Volumn , Issue , 2007, Pages 195-198

  Sundstrom T ^a   Alvandpour, A ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

CMOS; Comparator; Flash ADC; Kick back; Low power

Indexed keywords

AUTOMOBILE DRIVERS; COMPARATORS (OPTICAL); ELECTRIC VARIABLES MEASUREMENT; ELECTRONICS INDUSTRY; MULTICARRIER MODULATION;

CMOS; CMOS PROCESSING; COMPARATOR; FLASH ADC; INTERNATIONAL CONFERENCES; KICK-BACK; LOW POWERS; LOW-POWER; POWER DISSIPATIONS; POWER REDUCTIONS; RESISTANCE LADDER;

INTEGRATED CIRCUITS;

EID: 47749095061     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MIXDES.2007.4286149     Document Type: Conference Paper

References (4)

1. G. Van der Plas, S. Decoutere, S. Donnay, "A 0.16pJ/Conversion-Step 2.5mW 1.25GS/s 4b ADC in a 90nm Digital CMOS Process", IEEE International Soild-State Circuits Conference Digest of Technical Papers, 2006, pp. 2310
2. S. Park, Y. Palaskas, M.P Flynn, "A 4GS/s 4b Flash ADC in 0.18?m CMOS", IEEE International Solid-State Circuits Conference Digest of Technical Papers, 2006, pp 2330-2339
3. L. Sumanen, M. Waltari, V. Hakkarainen, K. Halonen, "CMOS dynamic comparators for pipeline A/D converters", IEEE International Symposium on Circuits and Systems, 2002, Volume 5, pp 157-160
4. A.G.W. Venes, R.J van-de-Plassche, "An 80-MHz, 80-mW, 8-b CMOS folding A/D converter with distributed track-and-hold preprocessing", IEEE Journal of Solid-State Circuits, Volume 31, Issue 12, pp 1846-1853, Dec 1996