Automatic abstraction refinement for generalized symbolic trajectory evaluation

Proceedings - Formal Methods in Computer Aided Design, FMCAD 2007

Volumn , Issue , 2007, Pages 111-118

  Chen, Yan ^a   He, Yujing ^a   Xie, Fei ^a   Yang, Jin ^b  

^a Department of Electrical and Computer Engineering   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTION-REFINEMENT; BENCHMARK CIRCUITS; CIRCUIT NODES; COMPREHENSIVE APPROACH; COUNTEREXAMPLE-GUIDED ABSTRACTION REFINEMENT (CEGAR); ERROR TRACES; FALSE NEGATIVES; GENERALIZED SYMBOLIC TRAJECTORY EVALUATION (GSTE); LARGE SIZES; MODEL REFINEMENT; UNDER CONSTRAINED;

BENCHMARKING; COMPUTER AIDED DESIGN; ERROR ANALYSIS; FORMAL METHODS; NETWORKS (CIRCUITS); TRAJECTORIES;

ABSTRACTING;

EID: 47349121004     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FAMCAD.2007.11     Document Type: Conference Paper

References (14)

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