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Volumn 29, Issue 7, 2008, Pages 781-783

Partially depleted SONOS FinFET for unified RAM (URAM) - Unified function for high-speed 1T DRAM and nonvolatile memory

Author keywords

1T DRAM; Capacitorless DRAM; FinFET; Nonvolatile memory (NVM); SONOS; Unified RAM (URAM)

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC MACHINE INSULATION; FIELD EFFECT TRANSISTORS; OPTICAL DESIGN; RANDOM ACCESS STORAGE; SPEED;

EID: 47249136108     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.2000616     Document Type: Article
Times cited : (22)

References (5)
  • 1
    • 0034250576 scopus 로고    scopus 로고
    • High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current flash technology
    • Aug
    • M. K. Cho and D. M. Kim, "High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current flash technology," IEEE Electron Device Lett., vol. 21, no. 8, pp. 399-401, Aug. 2000.
    • (2000) IEEE Electron Device Lett , vol.21 , Issue.8 , pp. 399-401
    • Cho, M.K.1    Kim, D.M.2
  • 4
    • 0036610025 scopus 로고    scopus 로고
    • A capacitorless double-gate DRAM cell
    • Jun
    • C. Kuo, T.-S. King, and C. Hu, "A capacitorless double-gate DRAM cell," IEEE Electron Device Lett., vol. 23, no. 6, pp. 345-347, Jun. 2002.
    • (2002) IEEE Electron Device Lett , vol.23 , Issue.6 , pp. 345-347
    • Kuo, C.1    King, T.-S.2    Hu, C.3
  • 5
    • 26444456024 scopus 로고    scopus 로고
    • A study of highly scalable DG-FinDRAM
    • Sep
    • E. Yoshida, T. Miyashita, and T. Tanaka, "A study of highly scalable DG-FinDRAM," IEEE Electron Device Lett., vol. 26, no. 9, pp. 655-657, Sep. 2005.
    • (2005) IEEE Electron Device Lett , vol.26 , Issue.9 , pp. 655-657
    • Yoshida, E.1    Miyashita, T.2    Tanaka, T.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.