Bit-parallel polynomial basis multiplier for new classes of finite fields

IEEE Transactions on Computers

Volumn 57, Issue 8, 2008, Pages 1023-1031

  Wu, Huapeng ^a  

^a UNIVERSITY OF WINDSOR   (Canada)

Author keywords

Finite fields arithmetic; Hardware architecture; Irreducible polynomial; Polynomial basis

Indexed keywords

BIT PARALLEL; FINITE FIELDS; POLYNOMIAL BASES;

EID: 47049121755     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/TC.2008.67     Document Type: Article

References (15)

1. E.R. Berlekamp, "Bit-Serial Reed-Solomon Encoders," IEEE Trans. Information Theory, vol. 28, pp. 869-874, Nov. 1982.
2. A. Halbutogullari and Ç.K. Koç, "Mastrovito Multiplier for General irreducible Polynomials," IEEE Trans. Computers, vol. 49, no. 5, pp. 503-518, May 2000.
3. D. Harikerson, A. Menezes, and S. Vanstone, Guide to Elliptic Curve Cryptography. Springer, Dec. 2003.
4. m)," IEE Proc.-E, vol. 139, no. 3, pp. 230-236, May 1992.
5. m)," Information and Computation, vol. 83, pp. 21-40, 1989.
6. J.L. Massey and J.K. Omura, "Computational Method and Apparatus for Finite Field Arithmetic," US patent 4,58T.627. 1986.
7. E.D. Mastrovito," VLSI Architectures for Computation in Galois Fields," PhD dissertation, Linkoping Univ., 1991.
8. A.J. Menezes, P.C. van Oorschot, and S.A. Vanstone, Handbook of Applied Cryptography. CRC Press, 1996.
9. C. Paar. "Efficient VLSI Architectures for Bit-Parallel Computationin Galois Fields," PhD dissertation, VDI-Verlag, 1994.
10. m," IEEE Trans. Computers, vol. 53, no. 8, pp. 945-958, Aug. 2004.
11. F. Rodriguez-Henriquez and Ç.K. Koç, "Parallel Multipliers Based on Special Irreducible Pentanomials," IEEE Trans. Computers, vol. 52, no. 12, pp. 1535-1542, Dec. 2003.
12. B. Sunar and Ç.K. Koç, "Mastrovitto Multiplier for All Trinomials," IEEE Trans. Computers, vol. 48, no. 5, pp. 522-527, May 1999.
13. H. Wu, "Bit-Parallel Finite Field Multiplier and Squarer Using Polynomial Basis," IEEE Trans. Computers, vol. 51, no. 7, pp. 750-758, July 2002.
14. H. Wu, M.A. Hasan, I.F. Blake, and S. Gao, "Finite Field Multiplier Using Redundant Representation," IEEE Trans. Computers, vol. 51, no. 11, pp. 1306-1316, Nov. 2002.
15. T. Zhang and K.K. Parhi "Systematic of Original and Modified Mastrovito Multipliers for Generg Irreducible Polynomials," IEEE Trans. Computers, vol. 50, no. 7, pp. 734-748, July 2001.