Simulation of advanced tunneling devices

Conference Proceedings - The 6th International Conference on Advanced Semiconductor Devices and Microsystems, ASDAM'06

Volumn , Issue , 2006, Pages 121-124

  Heigl, A ^a   Wachutka, G ^a  

^a TECHNICAL UNIVERSITY OF MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CONDUCTIVITY; EXCAVATION; MICROSYSTEMS; MOS DEVICES; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR MATERIALS; SEMICONDUCTOR SWITCHES; TUNNELING (EXCAVATION);

(+ MOD 2N) OPERATION; BAND GAPS; CONFERENCE PROCEEDINGS; DEVICE SIMULATIONS; GA TE LENGTHS; IN ORDER; INTERNATIONAL CONFERENCES; NANO SCALING; PHONON ASSISTED TUNNELING; PUNCH-THROUGH (PT); REALISTIC DEVICES; SHORT-CHANNEL EFFECT (SCE); TUNNELING DEVICES;

SEMICONDUCTOR DEVICES;

EID: 46749124774     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASDAM.2006.331169     Document Type: Conference Paper

References (4)

1. W. Hansch, C. Fink, J. Schulze and I. Eisele, "A vertical MOS-gated Esaki tunneling transistor in silicon", Thin SolidFilms 369, 2000, pp.387-389.
2. G. Hurkx, D. Klaassen and M. Knuvers, "A new recombination model for device simulation including tunneling", IEEE Trans. Elec. Dev. 39(2), 1992, pp. 331-338.
3. E.O. Kane, "Theory of tunneling", J. Appl. Phys. 32(1), 1961, pp. 83-91.
4. A. Schenk, "Advanced Physical Models for Silicon Device Simulation", Springer-Verlag, Wien, 1998.