Vertical MOS-gated Esaki tunneling transistor in silicon

Thin Solid Films

Volumn 369, Issue 1, 2000, Pages 387-389

  Hansch, W ^a   Fink, C ^a   Schulze, J ^a   Eisele, I ^a  

^a BUNDESWEHR UNIVERSITY MUNICH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; GATES (TRANSISTOR); MOLECULAR BEAM EPITAXY; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; SEMICONDUCTOR GROWTH; TUNNEL DIODES;

ESAKI TUNNELING TRANSISTORS; VERTICAL TUNNELING DEVICES;

MOSFET DEVICES;

EID: 0034225075     PISSN: 00406090     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0040-6090(00)00896-8     Document Type: Article

References (8)

1. For an overview see for example: S. Luryi, A. Zaslavsky, Quantum effect and hot-electron devices, in: S.M. Sze (Ed.), Modern Semiconductor Device Physics, Wiley, New York, 1998.
2. W Hansch V.R Rao C Fink F Kaesen I Eisele Thin Solid Films 321 1998 206
3. V.R. Rao, W. Hansch, I. Eisele. IEDM’ 97, Tech. Dig, p. 811
4. J.J Quinn G Kawamoto B.D McCombe Surf. Sci. 73 1978 190
5. J. Koga, A. Toriumi. IEDM’96, Tech. Dig, p. 265
6. See for example: H. Baumgärtner, W. Hansch, F. Wittmann, I. Eisele, Molecular beam epitaxy for silicon nanoelectronics, in: S.G. Pandalai (Ed.), Current Topics in Crystal Growth Research, Vol. 2, 1995, p. 283.
7. L Esaki Phys. Rev. 109 1958 603
8. The National Technology Roadmap for Semiconductors, SIA Semiconductor Industry Association, 1997, Santa Clara, CA.