Direct PWM synchronization using an all digital phase-locked loop for high power grid-interfacing converters

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 2007, Pages 901-906

  Xu, Dewei ^a   Li, Yun Wei ^a   Wu, Bin ^a  

^a RYERSON UNIVERSITY   (Canada)

Author keywords

All digital phase locked loop (ADPLL); Current source rectifier (CSR); Grid interfacing converter; High power converter; Synchronized pulse width modulation (PWM)

Indexed keywords

CONTROL SYSTEMS; COUNTING CIRCUITS; DC GENERATORS; DIGITAL ARITHMETIC; DIGITAL SIGNAL PROCESSORS; ELECTRIC POWER TRANSMISSION NETWORKS; EXHIBITIONS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); JITTER; PHASE LOCKED LOOPS; POWER ELECTRONICS; POWER GENERATION; PULSE MODULATION; PULSE WIDTH MODULATION; SPURIOUS SIGNAL NOISE; SWITCHING; SWITCHING CIRCUITS; TELECOMMUNICATION;

ALL DIGITAL; APPLIED (CO); CLOCK FREQUENCIES; CONTROL METHODS; CONVERTERS (PAPER INDUSTRY); FEED FORWARD LOOP; FPGA CONTROL; GRID-CONNECTED; HIGH POWERS; INPUT FREQUENCY; MEDIUM VOLTAGE (MV); PHASE ERROR (PE); PULL-IN; PWM CURRENT SOURCE RECTIFIER; PWM TECHNIQUES; SAMPLING ANGLE; SWITCHING CONVERTERS; SWITCHING POWER; SYNCHRONIZATION METHODS; WAVE FORMS;

ELECTRIC RECTIFIERS;

EID: 46449095139     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEX.2007.357622     Document Type: Conference Paper

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