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Volumn 1, Issue , 2004, Pages 445-450

Image processing vision system implementing a smart sensor

Author keywords

CMOS APS Sensors; Image processing; Retina; System on Chip

Indexed keywords

ALGORITHMS; BANDWIDTH; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER SOFTWARE; ENERGY UTILIZATION; FEATURE EXTRACTION; FIELD PROGRAMMABLE GATE ARRAYS; IMAGE SEGMENTATION; MICROPROCESSOR CHIPS; OPERATIONAL AMPLIFIERS; PARAMETRIC AMPLIFIERS; VLSI CIRCUITS;

EID: 4644311053     PISSN: 10915281     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (6)

References (14)
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    • Centre for High Performance Integrated Technologies and Systems, The University of Adelaide, March 1997. Kluwer Academic Publishers, ed. I. 0-7923-8664-7
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    • (2000) Technical Report
    • Moini, A.1
  • 2
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    • Evaluation of an artificial CMOS retina sensor for tracking systems
    • Versailles, France
    • A. Elouardi, S. Bouaziz, R. Reynaud "Evaluation of an artificial CMOS retina sensor for tracking systems" Pro. of IEEE IV'2002, Versailles, France.
    • Pro. of IEEE IV'2002
    • Elouardi, A.1    Bouaziz, S.2    Reynaud, R.3
  • 4
    • 0032667692 scopus 로고    scopus 로고
    • Pixel level processing Why, what and how?
    • Abbas El Gamal, and al, "Pixel level processing Why, what and how?" SPIE Vol.3650, 1999, pp. 2-13.
    • (1999) SPIE , vol.3650 , pp. 2-13
    • El Gamal, A.1
  • 5
    • 0034229347 scopus 로고    scopus 로고
    • A 256×256-pixel smart CMOS image sensor for line based stereo vision applications
    • Juillet
    • Y. Ni, J.H Guan "A 256×256-pixel Smart CMOS Image Sensor for Line based Stereo Vision Applications", IEEE, J. of Solid State Circuits, Vol. 35 No. 7, Juillet 2000, pp. 1055-1061.
    • (2000) IEEE, J. of Solid State Circuits , vol.35 , Issue.7 , pp. 1055-1061
    • Ni, Y.1    Guan, J.H.2
  • 6
    • 0003664069 scopus 로고    scopus 로고
    • Ph.D. thesis, University of Manchester Institute of Science and Technology (UMIST), May
    • P. Dudek "A programmable focal-plane analogue processor array" Ph.D. thesis, University of Manchester Institute of Science and Technology (UMIST), May 2000.
    • (2000) A Programmable Focal-plane Analogue Processor Array
    • Dudek, P.1
  • 8
    • 0035056785 scopus 로고    scopus 로고
    • A real-time FPGA architecture for computer vision
    • January
    • Miguel Arias-Estrada. "A Real-time FPGA Architecture for Computer Vision" Journal of Electronic Imaging (SPIE -IS&T),Vol. 10, No. 1, January 2001, pp. 289-296.
    • (2001) Journal of Electronic Imaging (SPIE -IS&T) , vol.10 , Issue.1 , pp. 289-296
    • Arias-Estrada, M.1
  • 9
    • 0033696415 scopus 로고    scopus 로고
    • A programmable vision chip for CNN based algorithms
    • Catania, Italy: IEEE 00TH8509
    • A. Dupret, J.O Klein, A. Nshare "A programmable vision chip for CNN based algorithms" CNNA 2000, Catania, Italy: IEEE 00TH8509.
    • CNNA 2000
    • Dupret, A.1    Klein, J.O.2    Nshare, A.3
  • 11
    • 84949682373 scopus 로고    scopus 로고
    • An improved ARAM for PARIS, an original vision chip
    • Frankfurt/Main, World Publishing
    • A. Nshare, J.O Klein, A. Dupret "An improved ARAM for PARIS, an original vision chip" CNNA2002, Frankfurt/Main, World Publishing 2002, pp 347-354.
    • (2002) CNNA2002 , pp. 347-354
    • Nshare, A.1    Klein, J.O.2    Dupret, A.3
  • 12
    • 4544306936 scopus 로고    scopus 로고
    • Image processing device for automotive vision systems
    • Versailles, France
    • Shoji Muramatsu and al., Image Processing Device for Automotive Vision Systems, Pro. of IV'2002, Versailles, France.
    • Pro. of IV'2002
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  • 14
    • 84893895215 scopus 로고    scopus 로고
    • Real-time image processing on a focal plane SIMD array
    • San Juan, Puerto Rico, USA
    • A. Gentile, J.L. Craz-Rivera and al "Real-Time Image processing on a Focal Plane SIMD Array" IPPS/SPDP Workshops 1999:400-405. San Juan, Puerto Rico, USA.
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    • Gentile, A.1    Craz-Rivera, J.L.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.