Runtime deadlock analysis of SystemC designs

Proceedings - IEEE International High-Level Design Validation and Test Workshop, HLDVT

Volumn , Issue , 2006, Pages 187-194

  Cheung, Eric ^a   Satapathy, Piyush ^a   Pham, Vi ^a   Hsieh, Harry ^a   Chen, Xi ^b  

^a University of California Riverside   (United States)

^b Novas Software Inc   (United States)

Author keywords

Cyclic dependency; Deadlock; Simulation; Synchronization; System level design; SystemC

Indexed keywords

DISCRETE EVENT SIMULATION; GRAPH THEORY; LEAD; MOTION PICTURE EXPERTS GROUP STANDARDS; PHILOSOPHICAL ASPECTS; TESTING;

ACCURATE SIMULATION; CONCURRENT SYSTEMS; DEADLOCK ANALYSIS; DEADLOCK DETECTION; DISCRETE EVENTS; DYNAMIC DEPENDENCY; HIGH LEVEL DESIGNS; INTERNATIONAL (CO); JPEG ENCODERS; MODELING LANGUAGES; REAL-WORLD DESIGNS; RUN TIME; SIMULATION KERNELS; SYSTEM LEVELS; SYSTEMC;

LOGIC DESIGN;

EID: 46249119618     PISSN: 15526674     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HLDVT.2006.319990     Document Type: Conference Paper

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