-
2
-
-
0031356802
-
The disjunctive decomposition of logic functions
-
V. Bertacco and M. Damiani, "The disjunctive decomposition of logic functions," Proc. ICCAD, pp. 78-82, 1997.
-
(1997)
Proc. ICCAD
, pp. 78-82
-
-
Bertacco, V.1
Damiani, M.2
-
3
-
-
0019079475
-
Synthesis of combinational logic using decomposition and probability
-
Nov.
-
S. C. Crist, "Synthesis of combinational logic using decomposition and probability," IEEE Trans. Comput., Vol. C-29, No. 11, pp. 1013-16, Nov. 1980.
-
(1980)
IEEE Trans. Comput.
, vol.C-29
, Issue.11
, pp. 1013-1016
-
-
Crist, S.C.1
-
5
-
-
0031344391
-
On the relation between disjunctive decomposition and ROBDD variable ordering
-
2 Vol.
-
E. V. Dubrova, D. M. Miller, J. C. Muzio, "On the relation between disjunctive decomposition and ROBDD variable ordering," 1997 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM. 10 Years Networking the Pacific Rim, 1987-1997, pp. 688-691 Vol. 2, 2 Vol. xxiii+1021, 1997.
-
(1997)
1997 IEEE Pacific Rim Conference on Communications, Computers and Signal Processing, PACRIM. 10 Years Networking the Pacific Rim, 1987-1997
, vol.2
-
-
Dubrova, E.V.1
Miller, D.M.2
Muzio, J.C.3
-
6
-
-
0028518320
-
Logic synthesis for field-programmable gate arrays
-
Oct.
-
Ting-Ting Hwang, R. M. Owens, M. J. Irwin, and Kuo Hua Wang, "Logic synthesis for field-programmable gate arrays," IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst., Vol. 13, No. 10, pp. 1280-1287, Oct. 1994
-
(1994)
IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
, vol.13
, Issue.10
, pp. 1280-1287
-
-
Hwang, T.-T.1
Owens, R.M.2
Irwin, M.J.3
Wang, K.H.4
-
7
-
-
0028483037
-
EVBDD-based algorithm for integer linear programming, spectral transformation, and functional decomposition
-
Aug.
-
Y-T. Lai, M. Pedram, and S. B. K. Vrudhula, "EVBDD-based algorithm for integer linear programming, spectral transformation, and functional decomposition," IEEE Trans. CAD, Vol. 13, No. 8, pp. 959-975, Aug. 1994.
-
(1994)
IEEE Trans. CAD
, vol.13
, Issue.8
, pp. 959-975
-
-
Lai, Y.-T.1
Pedram, M.2
Vrudhula, S.B.K.3
-
8
-
-
0041695514
-
An exact and efficient algorithm for disjunctive decomposition
-
Oct.
-
Y. Matsunaga, "An exact and efficient algorithm for disjunctive decomposition," SASIMI'98, pp. 44-50, Oct. 1998.
-
(1998)
SASIMI'98
, pp. 44-50
-
-
Matsunaga, Y.1
-
9
-
-
0032319734
-
Finding all simple disjunctive decompositions using irredundant sum-of-products forms
-
Nov.
-
S. Minato and G. De Micheli, "Finding all simple disjunctive decompositions using irredundant sum-of-products forms," ICCAD-98, pp. 111-117, Nov. 1998.
-
(1998)
ICCAD-98
, pp. 111-117
-
-
Minato, S.1
De Micheli, G.2
-
11
-
-
0343895710
-
Efficient input support selection for sub-functions in functional decomposition based on information relationship measures
-
M. Rawski, L. Jozwiak, and T. Luba, "Efficient input support selection for sub-functions in functional decomposition based on information relationship measures," Euromicro 1999, Milan, Sept. 1999.
-
Euromicro 1999, Milan, Sept. 1999
-
-
Rawski, M.1
Jozwiak, L.2
Luba, T.3
-
12
-
-
0029368110
-
Non-exhaustive method for identification of optimal variable orderings in the decomposition of complex logic functions
-
Sept.
-
J. T. Proudfoot and S. M. Ngwira, "Non-exhaustive method for identification of optimal variable orderings in the decomposition of complex logic functions," IEE Proc., Comput. Digit. Tech., Vol. 142, No. 5, pp. 373-5, Sept. 1995.
-
(1995)
IEE Proc., Comput. Digit. Tech.
, vol.142
, Issue.5
, pp. 373-375
-
-
Proudfoot, J.T.1
Ngwira, S.M.2
-
14
-
-
0002553248
-
FPGA design by generalized functional decomposition
-
(Sasao ed.) Kluwer Academic Publishers
-
T. Sasao, "FPGA design by generalized functional decomposition," in (Sasao ed.) Logic Synthesis and Optimization, Kluwer Academic Publishers, 1993.
-
(1993)
Logic Synthesis and Optimization
-
-
Sasao, T.1
-
15
-
-
0003006920
-
On bi-decompositions of logic functions
-
T. Sasao and J. T. Butler, "On bi-decompositions of logic functions," ACM/IEEE International Workshop on Logic Synthesis, Tahoe City, California, May 1997.
-
ACM/IEEE International Workshop on Logic Synthesis, Tahoe City, California, May 1997
-
-
Sasao, T.1
Butler, J.T.2
-
18
-
-
0032634207
-
Totally undecomposable functions: Applications to efficient multiple-valued decompositions
-
Freiburg, Germany, May 20-23
-
T. Sasao, "Totally undecomposable functions: Applications to efficient multiple-valued decompositions," IEEE International Symposium on Multiple-Valued Logic, pp. 59-65, Freiburg, Germany, May 20-23, 1999.
-
(1999)
IEEE International Symposium on Multiple-Valued Logic
, pp. 59-65
-
-
Sasao, T.1
-
19
-
-
84885429917
-
Functional decompositions using an automatic test pattern generators and a logic simulator
-
T. Sasao and S. Kajihara, "Functional decompositions using an automatic test pattern generators and a logic simulator," ACM/IEEE International Workshop on Logic Synthesis, Tahoe City, California, June 28-30, 1999.
-
ACM/IEEE International Workshop on Logic Synthesis, Tahoe City, California, June 28-30, 1999
-
-
Sasao, T.1
Kajihara, S.2
-
20
-
-
84885430588
-
Arithmetic ternary decision diagrams and their applications
-
T. Sasao, "Arithmetic ternary decision diagrams and their applications," 4th International Workshop on Applications of the Reed-Muller Expansion in Circuit Design, Victoria, Canada, August, 1999.
-
4th International Workshop on Applications of the Reed-Muller Expansion in Circuit Design, Victoria, Canada, August, 1999
-
-
Sasao, T.1
-
21
-
-
0029510039
-
Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization
-
Nov.
-
H. Sawada, T. Suyama, and A. Nagoya, "Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization," ICCAD, pp. 353-359, Nov. 1995.
-
(1995)
ICCAD
, pp. 353-359
-
-
Sawada, H.1
Suyama, T.2
Nagoya, A.3
-
22
-
-
0015021260
-
A fast algorithm for the disjunctive decomposition of switching functions
-
March
-
V. Y-S, Shen, A. C. Mckellar, and P. Weiner, "A fast algorithm for the disjunctive decomposition of switching functions," IEEE Trans. Comput., Vol. C-20, No. 3, pp. 304-309, March 1971.
-
(1971)
IEEE Trans. Comput.
, vol.C-20
, Issue.3
, pp. 304-309
-
-
Shen, V.Y.-S.1
Mckellar, A.C.2
Weiner, P.3
-
23
-
-
0029227125
-
Lamda set selection in Roth-Karp decomposition for LUT-based FPGA technology mapping
-
June
-
W-Z Shen, J-D Huang, and S-M Chao, "Lamda set selection in Roth-Karp decomposition for LUT-based FPGA technology mapping," 32nd Design Automation Conference, pp. 65-69, June 1995.
-
(1995)
32nd Design Automation Conference
, pp. 65-69
-
-
Shen, W.-Z.1
Huang, J.-D.2
Chao, S.-M.3
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