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Volumn PART 1, Issue , 2006, Pages 352-355

An reconfigurable FIR filter design on a partial reconfiguration platform

Author keywords

Dynamic partial reconfiguration; Modular design; Reconfigurable FIR filter

Indexed keywords

DIGITAL FILTERS; DIGITAL SIGNAL PROCESSING; FILTER BANKS; SIGNAL PROCESSING; WAVE FILTERS;

EID: 46249101614     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CCE.2006.350791     Document Type: Conference Paper
Times cited : (16)

References (9)
  • 8
    • 33750202678 scopus 로고    scopus 로고
    • Managing Partial Dynamic Reconfiguration in Virtex-II Pro FPGAs
    • Xilinx, Fall
    • Philippe Brutel, "Managing Partial Dynamic Reconfiguration in Virtex-II Pro FPGAs," Xcell Journal, Xilinx, Fall 2004.
    • (2004) Xcell Journal
    • Brutel, P.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.