Reconfigurable parallel VLSI co-processor for space robots using FPGA

2006 IEEE International Conference on Robotics and Biomimetics, ROBIO 2006

Volumn , Issue , 2006, Pages 374-379

  Wei, R ^a   Jin, M H ^a   Xia, J J ^a   Xie, Z W ^a   Liu, H ^b  

^a HARBIN INSTITUTE OF TECHNOLOGY   (China)

^b GERMAN AEROSPACE CENTER DLR   (Germany)

Author keywords

CORDIC; FPGA; Space robot

Indexed keywords

AUTOMATION; BIOMIMETICS; CALCULATIONS; COMPUTATIONAL EFFICIENCY; COMPUTER CONTROL SYSTEMS; DATA HANDLING; DATA STORAGE EQUIPMENT; DIGITAL ARITHMETIC; DIGITAL COMPUTERS; FAULT TOLERANT COMPUTER SYSTEMS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FUNCTION EVALUATION; HARDWARE; INTERFACES (COMPUTER); INVERSE KINEMATICS; PIPELINES; ROBOTICS; ROBOTS;

(MIN ,MAX ,+) FUNCTIONS; CO ORDINATE ROTATION DIGITAL COMPUTER (CORDIC); CO PROCESSORS; CONTROL MODULES; FIELD PROGRAMMABLE GATE ARRAY (FPGA); HARDWARE SOLUTIONS; HARDWARE SYSTEMS; INTEGRATED APPROACH; INTERNATIONAL CONFERENCES; ON BOARD COMPUTER (OBC); PERFORMANCE ANALYSES; PERIPHERAL (SPI); RE-CONFIGURABLE; ROBOT CONTROLS; SINGLE CHIPS; SPACE ROBOTS; SQUARE ROOT FUNCTIONS; TRIPLE MODULAR REDUNDANCY (TMR);

COMPUTER SYSTEMS;

EID: 46249092602     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ROBIO.2006.340205     Document Type: Conference Paper

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