Area efficient architecture for large scale implementation of biologically plausible spiking neural networks on reconfigurable hardware

Proceedings - 2006 International Conference on Field Programmable Logic and Applications, FPL

Volumn , Issue , 2006, Pages 939-940

  Ghani, Arfan ^a   McGinnity, T Martin ^a   Maguire, Liam P ^a   Harkin, Jim ^a  

^a UNIVERSITY OF ULSTER   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 46249090094     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPL.2006.311352     Document Type: Conference Paper

References (5)

1. Selene Maya, Rocio Reynoso, Cesar Torres, and Miguel Arias Estarda, "Compact Spiking Neural Network Implementation in FPGA" FPL, LNCS 1896, pp. 270-276, Apr. 2000.
2. Wolfgang Maass, "Computing with Spikes", Technische Universitaet Graz, Austria
3. Arfan Ghani, Martin McGinnity, Liam P Maguire, " A Survey of Spiking Neural Networks (SNNs) -models, implementations and design flows" IEEE SMC, UK-RI, 2005, ISSN 1744-9189,Sep, 2005, pp 3-8, London, UK
4. B Glackin, LP Maguire, TM McGinity, A Belatreche, Q Wu "A Novel Approach for the Implementation of Large Scale Spiking Neural Networks on FPGA Harwdare", IWANN 2005, Springer (Berlin), ISBN 0302-9743, Pages 552-563
5. Gerstner and Kistler "Spiking Neuron Models: Single Neurons, Populations, Plasticity, Cambridge University press, 2002