Compact spiking neural network implementation in FPGA

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 1896, Issue , 2000, Pages 270-276

  Maya, Selene ^a   Reynoso, Rocio ^a   Torres, César ^a   Arias Estrada, Miguel ^a  

^a INSTITUTO NACIONAL DE ASTROFÍSICA   (Mexico)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATION THEORY; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); NETWORK ARCHITECTURE; NEURONS; RECONFIGURABLE ARCHITECTURES; STOCHASTIC SYSTEMS;

FPGA IMPLEMENTATIONS; FPGA SYNTHESIS; NEURON ARCHITECTURES; PULSE TRAIN; SIGNAL MULTIPLEXING; SPIKING NEURAL NETWORKS; SPIKING NEURON; VHDL SIMULATION;

NEURAL NETWORKS;

EID: 84937790555     PISSN: 03029743     EISSN: 16113349     Source Type: Journal    
DOI: 10.1007/3-540-44614-1_30     Document Type: Article

References (7)

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