Loop pipelining for high-throughput stream computation using self-timed rings

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD

Volumn , Issue , 2006, Pages 289-296

  Gill, Gennette ^a   Hansen, John ^a   Singh, Montek ^a  

^a UNIVERSITY OF NORTH CAROLINA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; MATHEMATICAL TRANSFORMATIONS; PIPELINES;

COMPUTER-AIDED DESIGN; HIGH-LEVEL PROGRAM; HIGH-THROUGHPUT (HT); INTERNATIONAL CONFERENCES; LOOP PIPELINING; LOOP STRUCTURES; LOOP UNROLLING; MULTIPLE DATA; NESTED LOOPS; STREAM PROCESSING; TRANSFORMATION ALGORITHMS;

THROUGHPUT;

EID: 46149100071     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICCAD.2006.320135     Document Type: Conference Paper

References (13)

1. Handshake Solutions, a Philips subsidiary. http://www.handshakesolutions. com/.
2. A. Aiken and A. Nicolau. Perfect pipelining: A new loop parallelization technique. In European Symposium on Programming, pages 221-235, 1988.
3. V. H. Allan, R. B. Jones, R. M. Lee, and S. J. Allan. Software pipelining, ACM Comput. Surv., 27(3):367-432, 1995.
4. M. Budiu. Spatial Computation. PhD thesis, Carnegie Mellon University, Computer Science Department, December 2003. Technical report CMU-CS-03-217.
5. A. Davis and S. M. Nowick. An introduction to asynchronous circuit design. Technical Report UUCS-97-013, Dept. of Computer Science, University of Utah, Sept. 1997.
6. J. L. Hennessy and D. A. Patterson. Computer architecture: a quantitative approach. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2002.
7. U. J. Kapasi, W. J. Dally, S. Rixner, P. R. Mattson, J. D. Owens, and B. Khailany. Efficient conditional operations for data-parallel architectures. In Proc. of IEEE/ACM Intl. Symp. on Microarchitecture, 2000.
8. K. Kennedy and J. R. Allen. Optimizing compilers for modern architectures: a dependence-based approach. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2002.
9. M. Theobald and S. M. Nowick. Transformations for the synthesis and optimization of asynchronous distributed control. In Proc. ACM/IEEE Design Automation Conf., June 2001.
10. T. E. Williams. Self-Timed Rings and their Application to Division. PhD thesis, Stanford University, June 1991.
11. T. E. Williams and M. A. Horowitz. A zero-overhead self-timed 160ns 54b CMOS divider. IEEE Journal of Solid-State Circuits, 26(11): 1651-1661, Nov. 1991.
12. K. Y. Yun, P. A. Beerel, V. Vakilotojar, A. E. Dooply, and J. Arceo. The design and verification of a high-performance low-control-overhead asynchronous differential equation solver. In Proc. Int. Symp. on Advanced Research in Asynchronous Circuits and Systems, pages 140-153. IEEE Computer Society Press, Apr. 1997.
13. K. Y Yun, P. A. Beerel, V. Vakilotojar, A. E. Dooply, and J. Arceo. The design and verification of a high-performance low-control-overhead asynchronous differential equation solver. IEEE Trans, on VLSI Systems, 6(4):643-655, Dec. 1998.