Ta2O5 interfacial layer between GST and W plug enabling low power operation of phase change memories

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2006, Pages

  Matsui, Y ^a   Kurotsuchi, K ^a   Tonomura, O ^a   Morikawa, T ^a   Kinoshita, M ^a   Fujisaki, Y ^a   Matsuzaki, N ^a   Hanzawa, S ^a   Terao, M ^a   Takaura, N ^a   Moriya, H ^a   Iwasaki, T ^a   Moniwa, M ^b   Koga, T ^b  

^a HITACHI LTD   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DATA STORAGE EQUIPMENT; ELECTRON DEVICES; TANTALUM;

LOW-POWER OPERATION; MEMORY CELLS; PHASE-CHANGE MEMORIES;

PHASE CHANGE MEMORY;

EID: 46049111869     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346908     Document Type: Conference Paper

References (4)

1. S. J. Ahn et al., "Highly Reliable 50nm Contact Cell Technology for 256Mb PRAM", Symposium on VLSI Tech. Dig., p. 98, 2005.
2. N. Matsuzaki et al., "Oxygen-doped GeSbTe Phase-change Memory Cells Featuring 1.5-V/100-μA Standard 0.13-μm CMOS Operations", IEDM Tech. Dig, p. 758, 2005.
3. K. Kurotsuchi et al., "Measurement Method for Transient Programming Current of 1T1R Phase Change Memory", Proc. ICMTS, p. 43, 2006.
4. K. Osada et al., "Phase change RAM operated with 1.5-V CMOS as low cost embedded memory" Proc. CICC proceedings, p. 431, 2005.