A 65nm CMOS SOC technology featuring strained silicon transistors for RF applications

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2006, Pages

  Post, I ^a   Akbar, M ^a   Curello, G ^a   Gannavaram, S ^a   Hafez, W ^a   Jalan, U ^a   Komeyll, K ^a   Lin, J ^a   Lindert, N ^a   Park, J ^a   Rizk, J ^a   Sacks, G ^a   Tsai, C ^a   Yeh, D ^a   Bai, P ^a   Jan, C H ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

EPITAXIAL GROWTH; NONMETALS; SILICON; TECHNOLOGY;

65NM CMOS TECHNOLOGY; CMOS SOC; RF APPLICATIONS; RF PERFORMANCE; STRAINED SILICON;

ELECTRON DEVICES;

EID: 46049083438     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346816     Document Type: Conference Paper

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