A basis-function canonical piecewise-linear approximation

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 55, Issue 5, 2008, Pages 1328-1334

  Wen, Chengtao ^a   Ma, Xiaoyan ^b  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b UNIVERSITÉ DE MONTPELLIER   (France)

Author keywords

Canonical piecewise linear representation (CPWL); Nonlinear approximation; Nonlinear circuit synthesis; PWL basis function (BF)

Indexed keywords

APPROXIMATION ALGORITHMS; CONTROL SYSTEM SYNTHESIS; FUNCTIONS; NEWTON-RAPHSON METHOD;

APPROXIMATION ACCURACY; BASIS FUNCTIONS; GAUSS-NEWTON METHODS; NONLINEAR APPROXIMATION; NONLINEAR CIRCUIT SYNTHESIS; PIECEWISE LINEAR APPROXIMATIONS; PIECEWISE LINEAR REPRESENTATION; THEORETICAL FRAMEWORK;

PIECEWISE LINEAR TECHNIQUES;

EID: 45549108141     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2008.916552     Document Type: Article

References (22)

1. C. Kahlert and L. O. Chua, "The complete canonical piecewise-linear representation-Part I: The geometry of the domain space," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 39, no. 2, pp. 222-236, Feb. 1992.
2. G. Guzelis and I. Goknar, "A canonical representation for piecewiseaffine maps and its applications to circuit analysis," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 38, pp. 1342-1354, 1991.
3. L. O. Chua and S. M. Kang, "Section-wise piecewise-linear functions: Canonical representation, properties, and applications," IEEE Trans. Circuits Syst., vol. CAS-24, no. 1, pp. 125-140, Jan. 1977.
4. L. O. Chua and A. C. Deng, "Canonical piecewise-linear representation," IEEE Trans. Circuits Syst., vol. 35, no. 1, pp. 101-111, Jan. 1988.
5. P. Julian, M. Jordan, and A. Desages, "Canonical piecewise-linear approximation of smooth functions," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 45, no. 5, pp. 567-571, May 1998.
6. L. Breiman, "Hinging hyperplanes for regression, classification and function approximation," IEEE Trans Inf. Theory, vol. 39, no. 9, pp. 999-1013, Sep. 1993.
7. P. Pucar and J. Sjoberg, "On the hinge-finding algorithm for hinging hyperplanes.," IEEE Trans Inf. Theory, vol. 44, pp. 1310-1319, 1998.
8. C. Kahlert and L. O. Chua, "A generalized canonical piecewise-linear representation," IEEE Trans. Circuits Syst., vol. 37, no. 3, pp. 373-382, Mar. 1990.
9. C. Wen and S. Wang, "A novel compact piecewise-linear representation," Int. J. Circuit Theory Appl., vol. 33, pp. 87-97, 2005, etc..
10. J.-N. Lin and R. Unbehauen, "Explicit piecewise-linear models," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 41, no. 9, pp. 931-933, Sep. 1994.
11. J.-N. Lin and R. Unbehauen, "Canonical piecewise-linear networks," IEEE Trans. Neural Netw., vol. 6, no. 1, pp. 43-50, Jan. 1995.
12. R. Batruni, "A multilayer neural network with piecewise-linear structure and back-propagation learning," IEEE Trans. Neural Netw. vol. 2, no. 2, pp. 395-403, Mar. 1991.
13. P. Julian, A. Desages, and O. Agamennoni, "High-level canonical piecewise-linear representation using a simplicial partition," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 46, no. 4, pp. 463-480, Apr. 1999.
14. P. Julian, A. Desages, and B. D'Amico, "Orthonormal high-level canonical PWL functions with applications to model reduction," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 47, no. 7, pp. 702-712, Jul. 2000.
15. M. Storace, P. Julian, and M. Parodi, "Synthesis of nonlinear multiport resistors: A PWL approach," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 49, no. 6, pp. 1138-1149, Jun. 2002.
16. M. Storace, R. Lorenzo, and M. Parodi, "A method for the approximate synthesis of cellular non-linear networks-Part 1: Circuit definition," Int. J. Circuit Theory Appl., vol. 31, pp. 277-297, 2003.
17. R. Lorenzo, M. Storace, and M. Parodi, "A method for the approximate synthesis of cellular non-linear networks-Part 2: Circuit reduction," Int. J. Circuit Theory Appl., vol. 31, pp. 299-313, 2003.
18. Chengtao, Wen, and S. Wang, "A compact f-f model of high-dimensional piecewise-linear function over a degenerate intersection.," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 52, pp. 815-821, 2005.
19. I. Opris, "Analog rank extractors," IEEE Trans. Circuits Syst. I, Fundam. Theory Appl., vol. 44, no. 11, pp. 1114-1121, Nov. 1997.
20. B. M. Wilamowski, E. S. Ferre-Pikal, and O. Kaynak, "Low power, current mode CMOS circuits for synthesis of arbitrary nonlinear functions," in Proc. 9th NASA Symp. VLSI Design, Albuquerque, NM, 2000.
21. M. S. Bhat, S. Rekha, and H. S. Jamadagni, "Extrinsic analog synthesis using piecewise-linear current-mode circuits," in Proc. Int. Conf. VLSI Design, 2006, pp. 51-56.
22. D. R. Hush and B. Horne, "Efficient algorithms for function approximation with piecewise-linear sigmoidal networks," IEEE Trans. Neural Netw., vol. 9, no. 6, pp. 1129-1141, Nov. 1998.