Investigation of diffusion rounding for post-lithography analysis

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 2008, Pages 480-485

  Gupta, Puneet ^a   Kahng, Andrew B ^b   Kim, Youngmin ^c   Shah, Saumil ^d   Sylvester, Dennis ^c  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c UNIVERSITY OF MICHIGAN   (United States)

^d Blaze DfM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AGGRESSIVE SCALING; CIRCUIT PERFORMANCES; DESIGN AUTOMATION CONFERENCE; FEATURE SIZES; POLY GATES; POWER RAILS; SOUTH PACIFIC; SUB-WAVELENGTH LITHOGRAPHY; T-SHAPED; WEIGHTING FUNCTIONS;

COMPUTER AIDED DESIGN; DIFFUSION; DIGITAL INTEGRATED CIRCUITS; ELECTRIC NETWORK ANALYSIS; INDUSTRIAL ENGINEERING; LITHOGRAPHY;

SEMICONDUCTOR DOPING;

EID: 45549107216     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASPDAC.2008.4483998     Document Type: Conference Paper

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