-
1
-
-
0026116572
-
RSFQ Logic/Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems
-
March
-
K. K. Likharev and V. K. Semenov, "RSFQ Logic/Family: A New Josephson-Junction Technology for Sub-Terahertz-Clock-Frequency Digital Systems," IEEE Trans. Appl. Supercond., vol. 1, pp. 3-28, March 1991.
-
(1991)
IEEE Trans. Appl. Supercond
, vol.1
, pp. 3-28
-
-
Likharev, K.K.1
Semenov, V.K.2
-
2
-
-
34547504707
-
Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, CORE 1β
-
June
-
Y. Yamanashi, M. Tanaka, A. Akimoto, H. Park,Y. Kamiya, N. Irie, N. Yoshikawa, A. Fujimaki, H. Terai, and Y. Hashimoto, "Design and Implementation of a Pipelined Bit-Serial SFQ Microprocessor, CORE 1β," IEEE Trans. Appl. Supercond., vol. 17, pp. 474-477, June 2007.
-
(2007)
IEEE Trans. Appl. Supercond
, vol.17
, pp. 474-477
-
-
Yamanashi, Y.1
Tanaka, M.2
Akimoto, A.3
Park, H.4
Kamiya, Y.5
Irie, N.6
Yoshikawa, N.7
Fujimaki, A.8
Terai, H.9
Hashimoto, Y.10
-
3
-
-
45449088973
-
Superconductive Single-Flux-Quantum Circuit/System Technology and 40 Gb/s Switch System Demonstration
-
San Francisco, pp, Feb. 3-7
-
Y. Hashimoto, S. Nagasawa, T. Satoh, K. Hinode, H. Suzuki, T. Miyazaki, M. Hidaka, N. Yoshikawa, H. Terai, and A. Fujimaki, "Superconductive Single-Flux-Quantum Circuit/System Technology and 40 Gb/s Switch System Demonstration," Technical Digest, 2008 IEEE International Solid-State Circuit Conference (ISSCC2008). San Francisco, pp. 532-533. Feb. 3-7, 2008.
-
(2008)
Technical Digest, 2008 IEEE International Solid-State Circuit Conference (ISSCC2008)
, pp. 532-533
-
-
Hashimoto, Y.1
Nagasawa, S.2
Satoh, T.3
Hinode, K.4
Suzuki, H.5
Miyazaki, T.6
Hidaka, M.7
Yoshikawa, N.8
Terai, H.9
Fujimaki, A.10
-
4
-
-
20144368603
-
Superconducting Digital Electronics
-
Oct
-
H. Hayakawa, N. Yoshikawa, S. Yorozu, and A. Fujimaki, "Superconducting Digital Electronics," Proceedings of the IEEE, vol. 92, pp. 1549-1563, Oct. 2004.
-
(2004)
Proceedings of the IEEE
, vol.92
, pp. 1549-1563
-
-
Hayakawa, H.1
Yoshikawa, N.2
Yorozu, S.3
Fujimaki, A.4
-
5
-
-
34548394185
-
Quantitative evaluation of delay time in the single-flux-quantum circuits
-
Oct
-
Iwasaki, M. Tanaka, N. Trie, A. Fujimaki, N. Yoshikawa, H. Terai, and S. Yorozu, "Quantitative evaluation of delay time in the single-flux-quantum circuits," Physica C, vol. 463-465, pp. 1068-1071, Oct. 2007.
-
(2007)
Physica C
, vol.463-465
, pp. 1068-1071
-
-
Iwasaki1
Tanaka, M.2
Trie, N.3
Fujimaki, A.4
Yoshikawa, N.5
Terai, H.6
Yorozu, S.7
-
6
-
-
25644439882
-
Design and implementation of double cscillator time-to-digital converter using SFQ logic circuits
-
T. Nishigai, M. Ito. N. Yoshikawa, A. Fujimaki, H. Terai, and S. Yorozu. "Design and implementation of double cscillator time-to-digital converter using SFQ logic circuits." Physica C, vol. 426-431, pp. 1699-1703, 2005.
-
(2005)
Physica C
, vol.426-431
, pp. 1699-1703
-
-
Nishigai, T.1
Ito, M.2
Yoshikawa, N.3
Fujimaki, A.4
Terai, H.5
Yorozu, S.6
-
7
-
-
34548434790
-
Improvement of Time Resolution of the Double-Oscillator Time-to-Digital Converter using SFQ Circuits
-
April
-
N. Nakamiya, T. Nishigai, N. Yoshikawa, A. Fujimaki, H. Terai, and S. Yorozu, "Improvement of Time Resolution of the Double-Oscillator Time-to-Digital Converter using SFQ Circuits," Physica C, vol. 463-465, pp. 1088-1091, April 2007.
-
(2007)
Physica C
, vol.463-465
, pp. 1088-1091
-
-
Nakamiya, N.1
Nishigai, T.2
Yoshikawa, N.3
Fujimaki, A.4
Terai, H.5
Yorozu, S.6
-
8
-
-
0036787265
-
A Single Flux Quantum standard logic cell library
-
S. Yorozu, Y. Kameda. H. Terai, A. Fujimaki, T. Yamada, and S. Tahara, "A Single Flux Quantum standard logic cell library," Physica C. vol. 378-381. pp. 1471-1474, 2002.
-
(2002)
Physica C
, vol.378-381
, pp. 1471-1474
-
-
Yorozu, S.1
Kameda, Y.2
Terai, H.3
Fujimaki, A.4
Yamada, T.5
Tahara, S.6
-
9
-
-
0029325870
-
A 380 ps 9.5 mW Josephson 4-kbit RAM operated at a high bit yield
-
S. Nagasawa, Y. Hashimoto, H. Numata, and S. Tahara, "A 380 ps 9.5 mW Josephson 4-kbit RAM operated at a high bit yield," IEEE Trans. Appl. Supercond., vol. 5, pp. 2447-2452, 1995.
-
(1995)
IEEE Trans. Appl. Supercond
, vol.5
, pp. 2447-2452
-
-
Nagasawa, S.1
Hashimoto, Y.2
Numata, H.3
Tahara, S.4
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