Analysis of wire bond and metallization degradation mechanisms in DMOS power transistors stressed under thermal overload conditions

Microelectronics Reliability

Volumn 44, Issue 9-11 SPEC. ISS., 2004, Pages 1485-1490

  Detzel, Th ^a   Glavanovics, M ^a   Weber, K ^a  

^a INFINEON TECHNOLOGIES AUSTRIA AG   (Austria)

Author keywords

[No Author keywords available]

Indexed keywords

DMOS POWER TRANSISTORS; POWER SWITCHES; THERMAL OVERLOADS; WIRE BONDS;

ACTIVATION ENERGY; CRACKS; CURRENT DENSITY; ELECTRIC CONTACTS; ELECTRIC LOADS; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; ELECTRIC SWITCHES; FATIGUE OF MATERIALS; METALLIC FILMS; METALLIZING; MOS DEVICES; SHEET METAL; SURFACE ROUGHNESS; THERMAL EFFECTS; WIRE;

TRANSISTORS;

EID: 4544357253     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.07.044     Document Type: Conference Paper

References (5)

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3. Gopalan S., Krabbenborg B., Egbers J.H., van Velzen B., Zingg R., "Reliability of power transistors against application driven temperature swings", ESREF 2002, Elsevier Science Ltd. 2002
4. Malberti P., Ciappa, M., Cattomio R., "A power-cycling-induced failure mechanism of IGBT multichip modules", 21st International Symposium for Testing and Failure Analysis, ISTFA 1995
5. Ramminger S., Türkes P., Wachutka G., "Crack Mechanism in Wire Bonding Joints", Microelectronics reliability vol. 38, No. 6-8, pp 1301-1305, 1998