A new structure to monitor electrical transients during programming of EEPROM memory cells

Microelectronics Reliability

Volumn 44, Issue 9-11 SPEC. ISS., 2004, Pages 1745-1750

  Baboux, N ^a   Plossu, C ^a   Boivin, P ^b  

^a INSTITUT DES NANOTECHNOLOGIES DE LYON   (France)

^b STMICROELECTRONICS   (France)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER STORAGE; CAPACITORS; COMPUTER PROGRAMMING; GATES (TRANSISTOR); POLYSILICON; SILICA; THERMAL EFFECTS;

EEPROM; ELECTRICAL TRANSIENTS; MEMORY CELLS; MEMORY EFFECTS;

ROM;

EID: 4544348793     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.microrel.2004.07.067     Document Type: Conference Paper

References (3)

1. Bez R., Cantarelli D. and Cappelleti P., IEEE Trans. on Electron. Dev. 37 (1990) p 1081.
2. Plossu C., Voisin J.M., Bos B., Raynaud C., Bouchakour R., Boivin P. and Balland B., J. Non-Crystalline Sol. 245 (1999) p 85.
3. Baboux N., Busseret C., Plossu C., Burignat S., Balland B. and Boivin P., J. Non-Crystalline Sol. 322 (2003) p 240.