Electron and hole mobility enhancements in sub-10 nm-thick strained silicon directly on insulator fabricated by a bond and etch-back technique

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 2004, Pages 52-53

  Aberg I ^a   Olubuyide, O O ^a   Chléirigh, C Ní ^a   Lauer, I ^a   Antoniadis, D A ^a   Li, J ^b   Hull, R ^b   Hoyt, J L ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^b University of Virginia   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CHEMICAL POLISHING; ELECTRIC CHARGE; ELECTRIC INSULATORS; ELECTRON MOBILITY; ELECTROSTATICS; HETEROJUNCTIONS; HOLE MOBILITY; MOSFET DEVICES; SECONDARY ION MASS SPECTROMETRY; TRANSMISSION ELECTRON MICROSCOPY;

CHEMICAL MECHANICAL POLISHING (CMP); SILICON ON INSULATORS (SOI); STRAINED SILICON DIRECTLY ON INSULATOR (SSDOI); THERMAL BUDGETS;

SEMICONDUCTING SILICON;

EID: 4544294967     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsit.2004.1345388     Document Type: Conference Paper

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