A 3.3-V 240-MS/s CMOS bandpass ΣΔ modulator using a fast-settling double-sampling SC filter

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue CIRCUITS SYMP., 2004, Pages 84-87

  Cheung, Vincent S L ^a   Luong, Howard C ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CAPACITORS; CMOS INTEGRATED CIRCUITS; CODE DIVISION MULTIPLE ACCESS; GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS; SAMPLING; SIGNAL TO NOISE RATIO; SWITCHED FILTERS;

BLUETOOTH; GAIN-BANDWIDTH (GB); POWER CONSUMPTION; SAMPLING RATES;

DELTA SIGMA MODULATION;

EID: 4544250917     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

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