Large-scale broadband parasitic extraction for fast layout verification of 3D RF and mixed-signal on-chip structures

IEEE MTT-S International Microwave Symposium Digest

Volumn 3, Issue , 2004, Pages 1399-1402

  Ling, Feng ^a   Qkhmatovski, Vladimir ^a   Harris, Warren ^a   McCracken, Stephen ^a   Dengi, Aykut ^a  

^a Neolinear Inc   (United States)

Author keywords

ASIC modeling; Fast EM solver; Mixer; Multi plane PFFTt; Parasitic extraction; Spiral inductor

Indexed keywords

ASIC MODELING; FAST ELECTROMAGNETIC (EM) SOLVER; MIXER; MULTIPLANE PRECORRECTED-FFT (PFFT); PARASITIC EXTRACTION; SPIRAL INDUCTOR;

ALGORITHMS; BROADBAND AMPLIFIERS; COMPUTER AIDED DESIGN; COMPUTER SIMULATION; ELECTRIC INDUCTORS; ELECTRIC LINES; LSI CIRCUITS; MAGNETOELECTRIC EFFECTS; MICROWAVES; SIGNAL PROCESSING;

MICROPROCESSOR CHIPS;

EID: 4544234658     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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