Single-grain Si thin-film transistors for analog and RF circuit applications

ESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference

Volumn , Issue , 2007, Pages 107-110

  Saputra, N ^a   Danesh, M ^a   Baiano, A ^a   Ishihara, R ^a   Long, J R ^a   Metselaar, J W ^a   Beenakker, C I M ^a   Karaki, N ^b   Hiroshima, Y ^b   Inoue, S ^b  

^a Department of Microelectronics   (Netherlands)

^b SEIKO EPSON Cooperation   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

AGRICULTURAL PRODUCTS; AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; ELECTRONICS ENGINEERING; GRAIN (AGRICULTURAL PRODUCT); OPERATIONAL AMPLIFIERS; POWER SUPPLY CIRCUITS; SILICON; THIN FILM TRANSISTORS;

BUILDING BLOCKS; CIRCUIT APPLICATIONS; EUROPEAN; OPERATIONAL AMPLIFIER (OPAMP); POWER SUPPLY REJECTION RATIO (PSRR); SOLID-STATE CIRCUITS CONFERENCE; THIN FILM TRANSISTOR (TFT); VOLTAGE REFERENCE;

NETWORKS (CIRCUITS);

EID: 44849120153     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ESSCIRC.2007.4430257     Document Type: Conference Paper

References (10)

1. V. Rana, et al., "High Performance P-Channel Single-Crystalline Si TFTs Fabricated Inside a Location-Controlled Grain by μCzochralski Process", IEICE Trans. Electron..Vol. E87-C, No.11, pp. 1943-1946, Nov. 2004.
2. P. C. van der Wilt, et al., "Formation of location-controlled crystalline islands using substrate-embedded-seeds in excimer-laser crystallization of silicon films", Appl. Phys. Lett., Vol. 72, No. 12, pp.1819-1822, 2001.
3. W. Fang,et al., "Automated Digital Circuits Design based on Single-Grain Si TFTs Fabricated Through the micro-Czochralski Process", AM-FPD 2006 Workshop, pp. 47-50, Tokyo, Japan, July 2006.
4. J.L. Botrel, et al., "Polysilicon high frequency devices for large area electronics: Characterization, simulation and modeling", Thin Solid Films, in Press, 2007.
5. J.-H. Ahn, et al., "High-Speed Mechanically Flexible Single-Crystal Silicon Thin-Film Transistors on Plastic Substrates", IEEE Electron Device Letters, Vol. 27, No. 6, pp. 460-462, June 2006.
6. BSIMSOI model, www-device.eecs.berkeley.edu /~bsimsoi.
7. J.Y.W. Seto, "The electrical properties of polycrystalline silicon films", J. Appl. Physics, Vol. 46, No. 12, Dec. 1975.
8. A. Baiano, et al., "DC modeling of Single-Grain Si TFTs using BSIMSOI", International TFT Conference, pp. 200-203, Jan. 2007.
9. A. Lewis, R. Bruce, "Circuit Design and Performance for Large Area Electronics", IEEE ISSCC Digest Tech. Papers, pp. 222-223. Feb. 1990.
10. R.J. Baker, CMOS Circuit Design, Layout and Simulation, Wiley Interscience, 2005.