Configurable multi-rate decoder architecture for QC-LDPC codes based broadband broadcasting system

IEEE Transactions on Broadcasting

Volumn 54, Issue 2, 2008, Pages 226-235

  Zhang, Luoming ^b   Gui, Lin ^b   Xu, Youyun ^a,b   Zhang, Wenju ^a,b  

^a IEEE

^b SHANGHAI JIAO TONG UNIVERSITY   (China)

Author keywords

Base matrix; Broadcast; Channel coding; FPGA; MMSA; Multi rate; Quasi cyclic low density parity check codes (QC LDPCC); Scalable throughput

Indexed keywords

BROADBAND NETWORKS; CHANNEL CODING; DECODING; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); SCALABILITY;

DECODING ALGORITHMS; HARDWARE CONSTRAINTS; MODIFIED MIN-SUM ALGORITHM (MMSA); SCALABLE THROUGHPUT;

BROADCASTING;

EID: 44649139852     PISSN: 00189316     EISSN: None     Source Type: Journal    
DOI: 10.1109/TBC.2007.913400     Document Type: Article

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