A CMOS Quad-Band-ΣΔ-transceiver for GSM-EDGE with dual mode transmitter architecture for low noise and high linearity

IEEE Radio Frequency Integrated Circuits Symposium, RFIC, Digest of Technical Papers

Volumn , Issue , 2004, Pages 431-434

  Simon, Martin ^a   Weigel, Robert ^b   Neurauter, Burkhard ^a   Märzinger, Günther ^c  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b UNIVERSITY OF ERLANGEN NUREMBERG   (Germany)

^c DICE GmbH & Co KG   (Austria)

Author keywords

modulation loop; GSM EDGE; SAW Filter; Vectormodulator

Indexed keywords

ΣΔ-MODULATION LOOP; GSM EDGE; SAW-FILTER; VECTOR MODULATOR;

AMPLIFICATION; BANDWIDTH; CAPACITORS; CMOS INTEGRATED CIRCUITS; LOW PASS FILTERS; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; PHASE MODULATION; SPECIFICATIONS; SPURIOUS SIGNAL NOISE; TRANSCEIVERS;

GLOBAL SYSTEM FOR MOBILE COMMUNICATIONS;

EID: 4444343620     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. P. M. Asbeck et. al, "Synergistic Design of DSP and Power Amplifier for Wireless Communication", IEEE Trans. Microwave Theory Tech., vol. 49, pp.2163-2169, Nov. 2001.
2. 3GPP TS 45.005 V4.4.0, June 2001, 3GPP.
3. Martin Simon and Robert Weigel, "A Low Noise Vector Modulator with integrated Basebandfilter in 120 nm CMOS Technology", IEEE RFIC2003, Philadelphia, pp.409-413, June 2003.
4. H. Perrott, T. T. Tewksbury, C. G. Sodini, "A 27-mW CMOS Fractional-N Synthesizer Using Digital Compensation for 2.5-Mb/s GFSK Modulation", IEEE Journal of Solid-State Circuits, vol. 32, no. 12, pp. 2048-2060, December 1997.