Efficient equivalence checking with partitions and hierarchical cut-points

Proceedings - Design Automation Conference

Volumn , Issue , 2004, Pages 539-542

  Anastasakis, Demosthenes ^a   Mcllwain, Lisa ^a   Pilarski, Slawomir ^b  

^a SYNOPSYS INC   (United States)

^b UNIVERSITY OF WASHINGTON   (United States)

Author keywords

Equivalence Checking; Logic Design; Verification

Indexed keywords

COMBINATORIAL MATHEMATICS; COMPUTATIONAL METHODS; COMPUTER SIMULATION; CONSTRAINT THEORY; HIERARCHICAL SYSTEMS; PROBLEM SOLVING;

EQUIVALENCE CHECKING; FUNCTIONAL EQUIVALENCE; VERIFICATION;

LOGIC DESIGN;

EID: 4444254061     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996714     Document Type: Conference Paper

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