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Volumn , Issue , 2004, Pages 428-433

A method to decompose multiple-output logic functions

Author keywords

BDD; Cascade; Characteristic function; FPGA

Indexed keywords

BENCHMARKING; BINARY CODES; COMPUTER NETWORKS; FIELD PROGRAMMABLE GATE ARRAYS; FUNCTIONS; ITERATIVE METHODS; LOGIC CIRCUITS;

EID: 4444239920     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/996566.996689     Document Type: Conference Paper
Times cited : (37)

References (16)
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    • Lake Tahoe, CA, June 12-15
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    • Sasao, T.1    Matsuura, M.2    Iguchi, Y.3
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    • (2002) International Workshop on Boolean Problems , pp. 123-132
    • Sasao, T.1
  • 12
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    • Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization
    • Nov.
    • H. Sawada, T. Suyama, and A. Nagoya, "Logic synthesis for look-up table based FPGAs using functional decomposition and support minimization, " Proc. ICCAD, pp. 353-359, Nov. 1995.
    • (1995) Proc. ICCAD , pp. 353-359
    • Sawada, H.1    Suyama, T.2    Nagoya, A.3
  • 14
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    • Functional multiple-output decomposition: Theory and implicit algorithm
    • June
    • B. Wurth, K. Eckl, and K. Anterich, "Functional multiple-output decomposition: Theory and implicit algorithm," Design Automation Conf., pp. 54-59, June 1995.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.