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Volumn , Issue , 2006, Pages 73-80

Generating hardware from OpenMP programs

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER PROGRAMMING LANGUAGES; COMPUTER SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); PARALLEL PROCESSING SYSTEMS;

EID: 43749101339     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2006.270297     Document Type: Conference Paper
Times cited : (35)

References (14)
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    • Bellows, P.1    Hutchings, B.2
  • 2
    • 40949136741 scopus 로고    scopus 로고
    • The RC100 Hardware
    • Celoxica Inc
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    • Reference Manual
  • 3
    • 35048831861 scopus 로고    scopus 로고
    • Defining Synthesizable OpenMP Directives and Clauses
    • M. Bubak et al, Eds, ICCS 2004
    • P. Dziurzanski and V. Beletskyy, "Defining Synthesizable OpenMP Directives and Clauses", M. Bubak et al. (Eds.): ICCS 2004, LNCS 3038, pp. 398-407, 2004.
    • (2004) LNCS , vol.3038 , pp. 398-407
    • Dziurzanski, P.1    Beletskyy, V.2
  • 4
    • 84955605122 scopus 로고    scopus 로고
    • The Trianus system and its application to custom computing
    • Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, Springer
    • S. Gehring and S. Ludwig, "The Trianus system and its application to custom computing", in Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, LNCS 1142, Springer, 1996.
    • (1996) LNCS , vol.1142
    • Gehring, S.1    Ludwig, S.2
  • 5
    • 40949103292 scopus 로고    scopus 로고
    • High-Level compilation for fine-grained FPGAs
    • IEEE Computer Society Press
    • M. Gokhale and E. Gomersall, "High-Level compilation for fine-grained FPGAs", in Proc. FCCM97, IEEE Computer Society Press, 1997.
    • (1997) Proc. FCCM97
    • Gokhale, M.1    Gomersall, E.2
  • 6
    • 0005222296 scopus 로고
    • HML: An innovative hardware description language and its translation to VHDL
    • Y. Li and M. Leeser, "HML: an innovative hardware description language and its translation to VHDL", in Proc. CHDL'95, 1995.
    • (1995) Proc. CHDL'95
    • Li, Y.1    Leeser, M.2
  • 7
    • 40949104561 scopus 로고    scopus 로고
    • C. Lin, S. Z. Guyer, D. Jimenez. The C-Breeze Compiler Infrastructure. TR-01-43, The University of Texas at Austin, November, 2001.
    • C. Lin, S. Z. Guyer, D. Jimenez. The C-Breeze Compiler Infrastructure. TR-01-43, The University of Texas at Austin, November, 2001.
  • 8
    • 33646862916 scopus 로고    scopus 로고
    • A framework for developing parametrised FPGA libraries
    • Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, Springer
    • W. Luk, S. Guo, N. Shirazi and N. Zhuang, "A framework for developing parametrised FPGA libraries", in Field-Programmable Logic, Smart Applications, New Paradigms and Compilers, LNCS 1142, Springer, 1996.
    • (1996) LNCS , vol.1142
    • Luk, W.1    Guo, S.2    Shirazi, N.3    Zhuang, N.4
  • 9
    • 0011273320 scopus 로고    scopus 로고
    • Pebble: A language for parametrised and reconfigurable hardware design
    • Field-Programmable Logic and Applications, R.W. Hartenstein and A, Keevallik editors, Springer
    • W. Luk and S. McKeever, "Pebble: a language for parametrised and reconfigurable hardware design", in Field-Programmable Logic and Applications, R.W. Hartenstein and A, Keevallik (editors), LNCS 1482, pp. 9-18, Springer, 1998.
    • (1998) LNCS , vol.1482 , pp. 9-18
    • Luk, W.1    McKeever, S.2
  • 10
    • 40949137180 scopus 로고    scopus 로고
    • OpenMP. http://www.openmp.org.
  • 11
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    • Constructing hardware-software systems from a single description
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  • 12
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.