Effects of temperature on metal gate FinFET circuit performance

Proceedings - IEEE International SOI Conference

Volumn , Issue , 2006, Pages 163-164

  Marshall, Andrew ^a   Xiong, Weize ^a   Cleavelin, C Rinn ^a   Matthews, Ken ^b   Konblinger, Gerhard ^c   Pacha, Christian ^c   Von Armin, Klaus ^c   Schulz, Thomas ^c   Schruefer, Klaus ^c   Patruno, Paul ^d  

^a TEXAS INSTRUMENTS   (United States)

^b ATDF Inc   (United States)

^c INFINEON TECHNOLOGIES AG   (Germany)

^d PARC TECHNOLOGIQUE DES FONTAINES   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CIRCUITS; COMPUTATIONAL METHODS; THERMAL EFFECTS;

BUILDING BLOCKS UP; BULK MATERIALS; FINFET CIRCUIT; PROCESS NODES;

FIELD EFFECT TRANSISTORS;

EID: 43749095176     PISSN: 1078621X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOI.2006.284488     Document Type: Conference Paper

References (4)

1. W. Xiong et-al, "FinFET Performance Enhancement with Tensile Metal Gates and Strained Silicon on Insulator (sSOI) Substrate" Device Research Conference, June 2006,
2. G. Knoblinger et-al, "Design and evaluation of basic analog circuits in an emerging MuGFET technology" SOI Conf, 3-6 Oct 2005, pp39- 40
3. C. Pacha, et-al, "Circuit Design Issues in Multi-Gate FET CMOS Technologies". IEEE ISSCC, p420-1,662, 2006
4. A. Marshall & S. Natarajan, "SOI Design: Analog, Memory and Digital Techniques", Kluwer, 2002, ISBN 0-7923-7640-4