Opportunities and challenges of emerging nanotechnologies for future high-speed and low-power logic applications

2005 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC

Volumn , Issue , 2005, Pages 17-

  Chau, Robert ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CARBON NANOTUBES; CMOS INTEGRATED CIRCUITS; FIELD EFFECT TRANSISTORS; LOGIC DEVICES; NANOWIRES;

INTRINSIC MOBILITY; LOW POWER LOGIC APPLICATIONS; SEMICONDUCTOR NANOWIRES;

NANOELECTRONICS;

EID: 43549099728     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EDSSC.2005.1635194     Document Type: Conference Paper

References (6)

1. R. Chau, IEEE Trans. Nanotechnology, vol. 4, pp. 153–158, 2005.
2. R. Chau, 2005 IEEE VLSI-TSA International Symposium on VLSI Technology, Hsinchu, Taiwan, pp. 13–16, 2005.
3. A. Javey, Nano Letters, vol. 4, pp. 447–450, 2004.
4. R. Chau, to be presented at the 2005 IEEE Compound Semiconductor IC Symposium, Palm Springs, California.
5. T. Ashley, Proceedings of 7th International Conference on Solid-State and Integrated Circuits Technology, Beijing, China, pp. 2253–2256, 2004.
6. S. Datta, to be presented at the IEDM 2005.