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Volumn 47, Issue 3, 2004, Pages 311-320

An integrated laboratory for processor organization, compiler design, and computer networking

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER NETWORKS; COMPUTER SYSTEMS; INTERFACES (COMPUTER); LABORATORIES; PROGRAM COMPILERS; STUDENTS; SYSTEMS ANALYSIS; TEACHING;

EID: 4344716087     PISSN: 00189359     EISSN: None     Source Type: Journal    
DOI: 10.1109/TE.2004.828385     Document Type: Article
Times cited : (21)

References (11)
  • 1
    • 0034249006 scopus 로고    scopus 로고
    • Microprocessor design project in an introductory VLSI course
    • Aug
    • R. B. Brown, R. J. Lomax, G. Carichner, and A. J. Drake, "Microprocessor design project in an introductory VLSI course," IEEE Trans. Educ., vol. 43, pp. 353-361, Aug. 2000.
    • (2000) IEEE Trans. Educ. , vol.43 , pp. 353-361
    • Brown, R.B.1    Lomax, R.J.2    Carichner, G.3    Drake, A.J.4
  • 2
    • 0029409372 scopus 로고
    • A protocol test system for the study of sliding window protocols on networked UNIX computers
    • Nov
    • D. Kassabian and A. Albicki, "A protocol test system for the study of sliding window protocols on networked UNIX computers," IEEE Trans. Educ., vol. 38, pp. 328-334, Nov. 1995.
    • (1995) IEEE Trans. Educ. , vol.38 , pp. 328-334
    • Kassabian, D.1    Albicki, A.2
  • 3
    • 4344616579 scopus 로고    scopus 로고
    • Computing curricula - final draft
    • [Online]. Available
    • Computing Curricula - Final Draft, The Joint Task Force on Computing Curricula IEEE-CS and ACM. (2001). [Online]. Available: http://www.computer.org/education/cc2001/final/index.htm
    • (2001) The Joint Task Force on Computing Curricula IEEE-CS and ACM
  • 7
    • 4344707265 scopus 로고    scopus 로고
    • Altera Company. [Online]. Available
    • Altera Company. (2001) System-on-a-Programmable Chip Development Board. [Online]. Available: http://www.altera.com/literature/ug/sopcug.pdf
    • (2001) System-on-a-Programmable Chip Development Board
  • 9
    • 4344630361 scopus 로고    scopus 로고
    • Implementation of UDP/IP protocol on FPGA and its performance evaluation
    • K. Morita and K. Abe, "Implementation of UDP/IP protocol on FPGA and its performance evaluation," in Proc. IPSJ General Conf., Special 5, 2001, pp. 157-158.
    • (2001) Proc. IPSJ General Conf., Special , vol.5 , pp. 157-158
    • Morita, K.1    Abe, K.2
  • 10
    • 4344604390 scopus 로고
    • [Online]. Available
    • J. Postel. (1983) Echo Protocol. RFC862. [Online]. Available: http://www.ietf.org/rfc/rfc862.txt
    • (1983) Echo Protocol. RFC862
    • Postel, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.