메뉴 건너뛰기




Volumn 2, Issue , 2004, Pages

A new cryptographic system and its VLSI implementation

Author keywords

[No Author keywords available]

Indexed keywords

BINARY SEQUENCES; BIT ERROR RATE; CMOS INTEGRATED CIRCUITS; COMPUTER HARDWARE; COMPUTER SIMULATION; DATA COMMUNICATION SYSTEMS; PROGRAM COMPILERS; SECURITY OF DATA; SIGNAL PROCESSING; SPEED CONTROL;

EID: 4344715607     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (1)

References (10)
  • 2
    • 0036697706 scopus 로고    scopus 로고
    • A new voice over internet protocol technique with hierarchical data security protection
    • J. I. Guo, J. C. Yen and S. F. Pai, "A new voice over internet protocol technique with hierarchical data security protection," IEE Proceedings - Vision, Image and Signal Proc., vol. 149, pp. 237-243, 2002.
    • (2002) IEE Proceedings - Vision, Image and Signal Proc. , vol.149 , pp. 237-243
    • Guo, J.I.1    Yen, J.C.2    Pai, S.F.3
  • 3
    • 0003508568 scopus 로고    scopus 로고
    • FIPS PUB 46, National Bureau of Standards, Washington, D. C., Jan.
    • "Data encryption standard," FIPS PUB 46, National Bureau of Standards, Washington, D. C., Jan. 1997.
    • (1997) Data Encryption Standard
  • 5
    • 0031623925 scopus 로고    scopus 로고
    • Reusable cryptographic VLSI core based on the SAFER K-128 algorithm with 251.8 Mbit/s throughput
    • A. Schubert, V. Meyer, and W. Anheier, "Reusable cryptographic VLSI core based on the SAFER K-128 algorithm with 251.8 Mbit/s throughput," Proc. 1998 IEEE Workshop on Signal Proc. Sys., pp. 437-446, 1998.
    • (1998) Proc. 1998 IEEE Workshop on Signal Proc. Sys. , pp. 437-446
    • Schubert, A.1    Meyer, V.2    Anheier, W.3
  • 6
    • 0036286934 scopus 로고    scopus 로고
    • VLSI implementation of high performance burst mode for 128-bit block ciphers
    • Y. Mitsuyama, Z. Andales, T. Onoye, and I. Shirakawa, "VLSI implementation of high performance burst mode for 128-bit block ciphers," Proc. ISCAS'2001, vol. 2, pp. 344-347, 2002.
    • (2002) Proc. ISCAS'2001 , vol.2 , pp. 344-347
    • Mitsuyama, Y.1    Andales, Z.2    Onoye, T.3    Shirakawa, I.4
  • 7
    • 0027150913 scopus 로고
    • VINCI: VLSI implementation of the new secret-key block cipher IDEA
    • A. Curiger, et. Al., "VINCI: VLSI implementation of the new secret-key block cipher IDEA," Proc. IEEE 1993 Custom Integrated Circuits Conf., pp. 15.5.1-15.5.4, 1993.
    • (1993) Proc. IEEE 1993 Custom Integrated Circuits Conf.
    • Curiger, A.1
  • 8
    • 67649903039 scopus 로고    scopus 로고
    • Integrated design of AES (Advanced Encryption Standard) encrypter and decrypter
    • C. C. Lu and S. Y. Tseng, "Integrated design of AES (Advanced Encryption Standard) Encrypter and Decrypter," Proc. ASAP'2002, pp. 277-285, 2002.
    • (2002) Proc. ASAP'2002 , pp. 277-285
    • Lu, C.C.1    Tseng, S.Y.2
  • 10
    • 84939735258 scopus 로고
    • Chaos - A tutorial for engineers
    • T. S. Parker and L. O. Chua, "Chaos - A tutorial for engineers," Proc. IEEE, vol. 75, pp. 982-1008, 1987.
    • (1987) Proc. IEEE , vol.75 , pp. 982-1008
    • Parker, T.S.1    Chua, L.O.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.