An adaptive circuits concept to address mismatch in analog circuits

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 2004, Pages

  Secareanu, Radu M ^a   Peterson, Bill ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CIRCUITS; ANALOG CIRCUITS; PROCESS TECHNOLOGIES; SYSTEM-ON-A-CHIP (SOC);

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DIGITAL TO ANALOG CONVERSION; ENERGY DISSIPATION; INTEGRATION; OPTIMIZATION; SPURIOUS SIGNAL NOISE;

MICROPROCESSOR CHIPS;

EID: 4344700280     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

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3. S. S. Somayajula, E. Snchez-Sinencio, and J. P. de Gyvez, "Analog Fault Diagnosis Based on Ramped Power Supply Current Signature Clusters," IEEE Transactions on Circuits and Systems, Vol. 43, No. 10, pp. 703-711, October 1996.
4. G. Giustolisi and C. Strano, "A Novel 1.5-V CMOS Mixer," Proceedings of the 8th Great Lakes Symposium on VLSI, pp. 113-117, March 1998.
5. L. Shih-Lien, "A Safe Single-Phase Clocking Scheme for CMOS Circuits," IEEE Journal of Solid-State Circuits, Vol. 23, No. 1, February 1988.