Modeling of substrate noise injected by digital libraries

Proceedings - International Symposium on Quality Electronic Design, ISQED

Volumn 2001-January, Issue , 2001, Pages 488-492

  Zanella, Stefano ^a   Neviani, Andrea ^a   Zanoni, Enrico ^a   Miliozzi, Paolo ^b   Charbon, Edoardo ^c   Guardiani, Carlo ^d   Carloni, Luca ^e   Sangiovanni Vincentelli, Alberto ^e  

^a UNIVERSITY OF PADOVA   (Italy)

^b Rockwell Semiconductor Systems   (United States)

^c CADENCE DESIGN SYSTEMS   (United States)

^d PDF SOLUTIONS INC   (United States)

^e UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC POWER SYSTEMS; LOGIC CIRCUITS; TIMING CIRCUITS;

ANALYTICAL FORMULAS; CATASTROPHIC FAILURES; CIRCUIT PERFORMANCE; CUMULATIVE EFFECTS; ELECTRICAL BEHAVIORS; ORTHOGONAL POLYNOMIAL; RESPONSE SURFACE METHODOLOGY; SUBSTRATE POTENTIAL;

DIGITAL LIBRARIES;

EID: 4344689712     PISSN: 19483287     EISSN: 19483295     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2001.915276     Document Type: Conference Paper

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