Parallel turbo decoding

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 2004, Pages

  Zhang, Yuping ^a   Parhi, Keshab K ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ERROR CORRECTION; GRAPH THEORY; SYNCHRONIZATION; THROUGHPUT; TRELLIS CODES; TURBO CODES;

INFORMATION BITS; INTERCONNECTIONS; PARALLEL DECODING; RECURSION UNITS;

DECODING;

EID: 4344646533     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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2. C. Schurgers, F. Catthoor, and M. Engels, "Optimized MAP Turbo Decoder," Proc. of 2000 IEEE Workshop on Signal Processing Systems (SiPS'00), pp. 245-254, Oct. 2000.
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6. M. J. Thul, F. Gilbert, T. Vogt, G. Kreiselmaier, and N. Wehn, "A Scalable System Architecture for High-throughput Turbo-decoders," to appear in Kluwer Academic Publishers, 2003.
7. C.Berrou, and A. Glavieux, "Near Optimium Error Correcting Coding and Decoding: Turbo Codes," IEEE Transactions on Communications, 44(10), pp. 1261-1271, Oct. 1996.
8. W. E. Ryan, "Concatenated Convolutional codes and Iterative Decoding," to appear in the forthcoming Wiley Encyclopedia of Telecommunications.
9. Z. Wang, Z. Chi, and K. K. Parhi, "Area-efficient High-speed Decoding Schemes for Turbo Decoders," IEEE Transactions on VLSI Systems, 0(6), pp. 902-912, Dec. 2002.
10. H. Dawid and H. Meyr, "Real-time algorithms and VLSI architectures for soft output MAP convolutional decoding", Proc. Personal, Indoor and Mobile Radio Communications, PIMRC'95, vol. 1, pp. 193-197, 1995.