A 5.8-GHz high efficient, low power, low phase noise CMOS VCO for IEEE 802.11a

Proceedings - 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2003

Volumn , Issue , 2003, Pages 94-97

  Wu, Sau Mou ^a   Liu, Ron Yi ^b   Chen, Wei Liang ^a  

^a YUAN ZE UNIVERSITY   (Taiwan)

^b CHUNGHWA TELECOM CO LTD   (Taiwan)

Author keywords

CMOS process; Energy consumption; Frequency synthesizers; Inductors; Phase noise; Radio frequency; Resonance; Tuning; Voltage controlled oscillators; Wireless LAN

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CIRCUIT OSCILLATIONS; CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; ELECTRIC POWER UTILIZATION; ENERGY UTILIZATION; FREQUENCY SYNTHESIZERS; MICROPROCESSOR CHIPS; OSCILLATORS (ELECTRONIC); OSCILLISTORS; PROGRAMMABLE LOGIC CONTROLLERS; RESONANCE; TUNING; VARIABLE FREQUENCY OSCILLATORS; WIRELESS LOCAL AREA NETWORKS (WLAN);

CMOS PROCESSS; FIGURE OF MERITS; LC VOLTAGECONTROLLED OSCILLATOR (VCO); LOW-POWER CONSUMPTION; PHASE NOISE PERFORMANCE; RADIO FREQUENCIES; TOTAL POWER CONSUMPTION; WLAN APPLICATIONS;

PHASE NOISE;

EID: 4344605839     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWSOC.2003.1213013     Document Type: Conference Paper

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