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Volumn , Issue , 2002, Pages 76-83

A dual-mode synchronous/asynchronous CORDIC processor

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PROGRAMS; DEGREES OF FREEDOM (MECHANICS); GERMANIUM ALLOYS; INTEGRATED CIRCUIT DESIGN; SOFTWARE RADIO;

EID: 4344580992     PISSN: 15228681     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article
Times cited : (12)

References (13)
  • 3
  • 4
    • 77957956162 scopus 로고
    • The token flow model
    • Hamilton Island, Australia May
    • J. Buck and E. A. Lee, "The token flow model", Data Flow Workshop, Hamilton Island, Australia, pp. 267-290, May 1992
    • (1992) Data Flow Workshop , pp. 267-290
    • Buck, J.1    Lee, E.A.2
  • 6
    • 0018467053 scopus 로고
    • Very fast fourier transform algorithms for implementation
    • May
    • A. M. Despain, "Very fast Fourier transform algorithms for implementation", IEEE Trans. Comput., vol. C - 28, no. 5, pp. 333-341, May 1979
    • (1979) IEEE Trans. Comput , vol.C-28 , Issue.5 , pp. 333-341
    • Despain, A.M.1
  • 7
    • 85013590781 scopus 로고
    • Generalized CORDIC for digital signal processing
    • May
    • D. T. Lee and M. Morf, "Generalized CORDIC for digital signal processing", Proc. ICASSP, vol. 3, pp. 1748-1751, May 1982
    • (1982) Proc. ICASSP , vol.3 , pp. 1748-1751
    • Lee, D.T.1    Morf, M.2
  • 8
    • 0029185242 scopus 로고
    • Multiplierless array architecture for computing discrete cosine transform
    • M. C. Mandal, A. S. Dhar and S. Banerjee, "Multiplierless array architecture for computing discrete cosine transform", Computers Elec. Eng., vol. 21, no. 1, pp. 13-19, 1995
    • (1995) Computers Elec. Eng , vol.21 , Issue.1 , pp. 13-19
    • Mandal, M.C.1    Dhar, A.S.2    Banerjee, S.3
  • 9
    • 0026222189 scopus 로고
    • An array architecture for fast computation of discrete Hartley transform
    • DOI 10.1109/31.83883
    • A. S. Dhar and S. Banerjee, "An array architecture for fast computation of discrete Hartley transform", IEEE Trans. Circuits and Syst., vol. 38, no. 9, pp. 1095 - 1098, 1991. (Pubitemid 21689663)
    • (1991) IEEE transactions on circuits and systems , vol.38 , Issue.9 , pp. 1095-1098
    • Dhar Anindya, S.1    Banerjee Swapna2
  • 10
  • 11
    • 0001158270 scopus 로고
    • Investigation into micropipeline latch design styles
    • P. Day, J. V. Woods, "Investigation into Micropipeline Latch Design Styles", IEEE Trans. On VLSI Systems, 3 (2), pp. 264-272, 1995
    • (1995) IEEE Trans. on VLSI Systems , vol.3 , Issue.2 , pp. 264-272
    • Day, P.1    Woods, J.V.2
  • 13
    • 0028369772 scopus 로고
    • Performance of iterative computation in self-timed rings
    • T. E. Williams, "Performance of Iterative Computation in Self-Timed Rings" Journal of VLSI Signal Processing, (7), pp. 17-31, 1994
    • (1994) Journal of VLSI Signal Processing , vol.7 , pp. 17-31
    • Williams, T.E.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.