Template generation and selection algorithms

Proceedings - 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, IWSOC 2003

Volumn , Issue , 2003, Pages 2-5

  Guo, Yuanqing ^a   Smit, G J M ^a   Broersma, H ^a   Heysters, P M ^a  

^a UNIVERSITY OF TWENTE   (Netherlands)

Author keywords

Clustering algorithms; Data mining; Electronic mail; Field programmable gate arrays; Flow graphs; Multimedia systems; Programmable logic arrays; System on a chip; Tiles; VLIW

Indexed keywords

ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; DATA FLOW ANALYSIS; DATA FLOW GRAPHS; DATA MINING; ELECTRONIC MAIL; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); FLOW GRAPHS; GRAPHIC METHODS; MICROPROCESSOR CHIPS; MULTIMEDIA SYSTEMS; PROGRAMMABLE LOGIC CONTROLLERS; RECONFIGURABLE ARCHITECTURES; STRUCTURAL DESIGN; SYSTEM-ON-CHIP; TEMPLATE MATCHING; TILE; VERY LONG INSTRUCTION WORD ARCHITECTURE;

CONTROL DATA FLOW GRAPHS; PROGRAMMABLE LOGIC ARRAY; RECONFIGURABLE SYSTEMS; SELECTION ALGORITHM; SYSTEM ON A CHIP; TEMPLATE GENERATION; TEMPLATE SELECTION; VLIW;

CLUSTERING ALGORITHMS;

EID: 43349088114     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IWSOC.2003.1212995     Document Type: Conference Paper

References (9)

1. Srinivasa R. Arikati, Ravi Varadarajan, "A Signature Based approach to Regularity Extraction", Proc. of Internaltional Conference on Computer-Aided Design (ICCAD), 1997, pp.542-545.
2. Srihari Cadambi, and Seth Copen Goldstein, "CPR: A Configuration Profiling Tool", IEEE Symposium on FPGAs for Custom Computing Machines, 1999.
3. Timothy J.Callahan, Philip Chong, Andre DeHon, and John Wawrzynek, "Fast Module Mapping and Placement for Datapaths in FPGAs", Proc. of International Sysp. of Field Programmable Gate Arrays, 1998.
4. Amit Chowdhary, Sudhakar Kale, Phani Saripella, Naresh Sehgal, Rajesh Gupta, "A General Approach for Regularity Extraction in Datapath Circuits", Proc. of Internaltional Conference on Computer-Aided Design (ICCAD) San Jose, CA, 1998, pp.332-338.
5. Miguel R. Corazao, Marwan A. Khalaf, Lisa M.Guerra, Miodrag Potkonjak and Jan M. Rabaey, "Performance Optimization Using Templete mapping for Datapath-Intensive High-Level Synthesis", IEEE Transactions on Computer-Aided Design of Intergrated Circuits and Systems, vol.15, No.8, August 1996, pp.877-888.
6. Ryan Kastner, Seda Ogrenci-Memik, Elaheh Bozorgzadeh and Majid Sarrafzadeh, "Instruction Generation for Hybrid Reconfigurable Systems", Proc. of International Conference on Computer-Aided Design (ICCAD), San Jose, CA, November, 2001.
7. D. Sreenivasa Rao, and Fadi J. Kurdahi, "On Clustering For Maximal Regularity Extraction", IEEE Transactions on Computer-Aided Design, vol.12, No.8,August,1993, pp.1198-1208.
8. Michel A.J. Rosien, Yuanqing Guo, Gerard J.M. Smit, Thijs Krol, "Mapping Applications to an FPFA Tile", Proc. of Date03, Munich, March, 2003
9. Gerard J.M. Smit, Paul J.M. Havinga, Lodewijk T. Smit, Paul M. Heysters, Michel A.J. Rosien, "Dynamic Reconfiguration in Mobile Systems", Proc. of FPL2002, Montpellier France, pp 171-181, September 2002.