Evaluation of a non-volatile FPGA based on MRAM technology

2006 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT'06

Volumn , Issue , 2006, Pages

  Zhao, W ^a   Belhaire, E ^a   Javerliac, V ^b   Chappert, C ^a   Dieny, B ^b  

^a CNRS   (France)

^b CEA GRENOBLE   (France)

Author keywords

FPGA; High speed; LUT; Magnetic; MRAM; MTJ; Multicontext; Non volatile; Register; SRAM

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; DATA ACQUISITION; MAGNETIC DISK STORAGE; RANDOM ACCESS STORAGE; SEMICONDUCTOR MATERIALS; TUNNEL JUNCTIONS;

EXTERNAL MEMORY; MAGNETIC TUNNEL JUNCTION (MJT); RAPID START-UP TIME;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA);

EID: 42749109083     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. K.Abe, T.Omori, M.Naraoka "A Programmable Logic Array Suitable for Use in Digital System Design Laboratories", IEEE Trans, on Education, Vol. 35, no. 4, Nov. 1992.
2. Kevin Morris, "Flash News Flash", FPGA and Programmable Logic Journal. January 25, 2005.
3. Stuart S.P.Parkin, "Spintronic Materials and Devices: Past, Present and future" Electron Devices Meeting, 2004. IEDM Technical Digest. IEEE International Volume , Issue , 13-15 Dec. 2004 pp: 903 - 906
4. V. Javerliac et al, "Magnetic tunnel junction compact device model for electrical simulations of spintronic components", Magnetism and Magnetic Materials 2005, Oct. 30 - Nov. 3, San Jose, California
5. W.C.Jeong Highly scalable MRAM using field assisted current induced switching Symposium on VLSI Technology Digest of Technical Papers.
6. W. C. Black Jr. and B. Das "Programmable logic using giant-magneto-resistance and spin-dependent tunneling devices" J. Appl. Phys., Vol. 87, No. 9, 1 May 2000 pp: 6674 -6679
7. V.Stojanovic et al, "Comparative analysis of master-slave Latches and Flip Flops for high-performance and low-power systems" IEEE Journal of solid-state circuits, Vol. 34, NO.4, April, 1999
8. Nam Sung Kim et al, "leakage current: Moore's law meets the static power" IEEE computer society November 2003, pp 68 -74
9. J.-P.Nozières et al, "Mémoire magnétique à consummation réduite" FR Patent 0112123
10. A. Fert et al, "Magnetization reversal by injection and transfer of spin: experiments and theory" Journal-of-Magnetism-and-Magnetic-Materials. May 2004; 272-276 pt. 3: 1706-11